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Found 1 result

  1. FPGA current limiting

    I was looking into how to limit current from FPGA pins, in the context of safely driving 7-segment LEDs. I thought that the .UCF output drive strength values were somewhat arbitrary values, but according to "Spartan-6 FPGA SelectIO Resources User Guide" the values are actually in mA. Nice. Yet, when I went to test this I got unexpected values. For instance, when I chose LVTTL & DRIVE=12 I think I got something like 46 mA, and when I reduced it to DRIVE=2 I think I got 6 dot something mA. Whatever it was it was very different from the specified DRIVE value. This was tested by shorting that pin to GND, with just the amp meter in series. Since the current did reduce when I reduced the drive strength, I though that maybe my cheap multimeter was not correctly calibrated. Yet, when I connected a 6.1 V power source with a 1K resistor in series I got the expected 6.1 mA. Any ideias?