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Hello, i've read about fpga project at http://hamsterworks.co.nz/mediawiki/index.php/OV7670_camera and then i have been tryring to compile and synthesize the vhdl program by myself. If i checked syntax one by one, there's no problem (no error). But, when i try to synthesize, the result always not successful because there's no syntax in frame buffer module. So, i'm looking for help about how to fix this problem. Then, i also want to know about what is "IP Block Memory Generator" that the project writer's said at hamsterwork. I am using OV7670 camera module and Nexys 4 FPGA Board. And i dont know how to connect OV7670 to nexys 4 board. Please help me, thank you