Search the Community: Showing results for tags 'Oric Atmos FPGA'.



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Found 1 result

  1. Oric Atmos on Pipistrello

    Following in the trails of ZX Spectrum on Pipistrello I present you with... Oric Atmos on Pipistrello. The Atmos is dear to my heart as it is my first personal computer I used when I was young. While all my friends were playing games on their Spectrums and Commodores I was bucking the trend spending countless hours with my Oric, my soldering iron and my Oric bible, the "Oric Advanced User Guide" writing 6502 machine code (back in those days we didn't have assemblers and compilers ) The only reason this is "for the Pipistrello" is because the Papilio Pro is one RAMB block short of being able to fit the design. The Oric Atmos 48K as the name implies has 48KB RAM and 16KB ROM. Technically the Oric has 64KB RAM but the top 16KB are hidden underneath the ROM and not normally accessible. As such this design does not implement that RAM to save resources, but could be easily added. So total RAM+ROM is 64KB equals 32 RAMB resources plus one more for the scan doubler. Drat! foiled again, it is that one extra RAMB that won't fit in the Papilio I have uploaded the source code for you to play with it. It is based on the sources I got from here OricInFPGA_V091 Initially I had hopes that I could just synthesize and go but alas, to my surprise these sources are non functional. Initially I got no signs of life at all, and well over 400 warnings when compiling. At first I attempted to elliminate the gated clocks in the design, of which there were plenty. After doing that it sprung into life, kind of. I could make sounds by typing the familiar ZAP and EXPLODE commands but the picture was majorly corrupted. The characters appeared to be the alternate character set (a sort of Teletext character set) instead of the normal ASCII, the cursor seemed to blink the entire left hand column instead of just the square it occupied, the color attributes did not line up with the character spaces, etc. After a large number of hours simulating and fixing issues I got it down to 38 warnings and only one gated clock. I ended up doing a major rewrite of the ULA (the main controller chip in the Oric) to the point it is now working as expected from the quick tests I did in LORES and HIRES. More testing remains to be done but this is a good start, have at it.