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Found 14 results

  1. Hi everyone, I have a papilio pro working successfully with designlab but I want to use a custom board (like papilio one) with it. I've selected papilio one 250k and "Load circuit" seems to be ok, but when I tried to upload... the output is attached: "Cannot get programmer version, aborting". I've checked COM port, FTDI configuration EEPROM is empty (with FT_prog), papilio drivers are loaded... I also tried to change some values in the FPGA (HSWAP is '0' so every pin will be pullup, but I've pulled up M0 and M2, and M1 to GND. Also "Done" and "init b" pulled up.)... Any help? My XC3S250E has different IDCODE so I've added this line to the devlist.txt file: Papilio-prog seems to work good. What is the problem? Thanks
  2. Hi. I have ported my custom board to designlab and have run various desginlab examples on it. One problem I could not solve yet is writing files to SD card usign SD examples. The sd card could successfully being initialized and even list the files inside it. but the file open and write fails. any suggestion to solve this is appreciated!
  3. Hi, I wonder why I am getting this strange error while I am trying to Burn bootloader to my board in designlab? Arduino: 1.0.8 (Windows 8), Board: "Papilio DUO FPGA 512KB - ZPUino" Error while burning bootloader. java.lang.NullPointerException at cc.arduino.packages.uploaders.SerialUploader.burnBootloader(SerialUploader.java:339) at processing.app.Editor$62.run(Editor.java:2907) at java.awt.event.InvocationEvent.dispatch(Unknown Source) at java.awt.EventQueue.dispatchEventImpl(Unknown Source) at java.awt.EventQueue.access$200(Unknown Source) at java.awt.EventQueue$3.run(Unknown Source) at java.awt.EventQueue$3.run(Unknown Source) at java.security.AccessController.doPrivileged(Native Method) at java.security.ProtectionDomain$1.doIntersectionPrivilege(Unknown Source) at java.awt.EventQueue.dispatchEvent(Unknown Source) at java.awt.EventDispatchThread.pumpOneEventForFilters(Unknown Source) at java.awt.EventDispatchThread.pumpEventsForFilter(Unknown Source) at java.awt.EventDispatchThread.pumpEventsForHierarchy(Unknown Source) at java.awt.EventDispatchThread.pumpEvents(Unknown Source) at java.awt.EventDispatchThread.pumpEvents(Unknown Source) at java.awt.EventDispatchThread.run(Unknown Source)
  4. Hello, I have brushed the dust off my Papilio Pro, and am trying to get the DesignLab IDE running on Ubuntu 16.05 LTS. I have installed and licensed Xilinx ISE 14.7_1015_1 as WebPack ISE seems to run fine... I installed the default-JRE as sudo apt-get install default-jre java -version openjdk version "9-internal" OpenJDK Runtime Environment (build 9-internal+0-2016-04-14-195246.buildd.src) OpenJDK 64-Bit Server VM (build 9-internal+0-2016-04-14-195246.buildd.src, mixed mode) I downloaded and set-up DesignLab as DesignLab-1.0.8-linux64.tgz, by running ubuntu-setup.sh I get errors when starting DesignLab: 1. JRE Version Problem $ ./DesignLab Exception in thread "main" java.lang.ExceptionInInitializerError at processing.app.Preferences.init(Preferences.java:286) at processing.app.Base.main(Base.java:168) Caused by: java.lang.NumberFormatException: For input string: "9-i" at jdk.internal.math.FloatingDecimal.readJavaFormatString(java.base@9-internal/FloatingDecimal.java:2054) at jdk.internal.math.FloatingDecimal.parseFloat(java.base@9-internal/FloatingDecimal.java:122) at java.lang.Float.parseFloat(java.base@9-internal/Float.java:451) at java.lang.Float.<init>(java.base@9-internal/Float.java:532) at processing.core.PApplet.<clinit>(Unknown Source) ... 2 more Problem seems to be that the Processing IDE base being used searches for a single digit version JRE http://askubuntu.com/questions/832486/errors-when-trying-to-run-arduino 2. Missing libraries I used nix-shell to create an environment with a different JRE, I just used the default jre. I'm not claiming this is anything other than a blind hack. I don't do java. $ java -version openjdk version "1.8.0_121" OpenJDK Runtime Environment (build 1.8.0_121-13) OpenJDK 64-Bit Server VM (build 25.121-b13, mixed mode) When I run ./DesignLab, the java. errors disappear, but I then get GTK errors: $ ./DesignLab Gtk-Message: Failed to load module "overlay-scrollbar" Gtk-Message: Failed to load module "canberra-gtk-module" I've tried all sorts of stuff - loaded every variant of GTK I can find.. I believe it is an interaction between the 'skin' of the java app and the jre. Can anyone offer a solution? Or.. Can anyone tell me what jre the original Processing IDE was delivered with/ or is compatible with? Cheers, -- Peter G
  5. Hi, Overall, I'm having a great time with the Duo and Pro and some assorted shields! Whilst working through some of the tutorials, though, I've noticed that after a short time the IDE menus begin to glitch. Specifically what happens is that the menu will jump around in strange ways, with the currently selected menu item not matching the item which was just below the mouse pointer before it was moved. This manifests itself soon after running the app, and very quickly as soon as large menus like "examples" are selected. One definite symptom is that the top of the menu gets graphically copied to the place just below the mouse, so the actual menu content below the mouse cannot properly be seen until the mouse is over it. Not a show-stopper, but annoying. Screenshots included. The main screen also fails to redraw occasionally when obscured by menus or other windows. This problem does not occur at all in large menus in the Arduino IDE 1.8.1 but DOES happen in the examples menu of Arduino IDE 1.0.3 and 1.5.2 when mousing up and down the File=>Examples sub-menu. OS is Windows 7 Pro 64 with 12GB of system RAM. No other programs seem to be doing this. Is anyone else seeing this, and is there a fix? Cheers! Joe
  6. Papilio DesignLab IDE

    Version 1.0.8

    8,426 downloads

    We live in exciting times where we can create masterpieces with the Arduino and marvels with the Raspberry Pi. Where we can use technology as a canvas to create things that amaze and amuse our friends and family. Wouldn't it be great if we could take the same technology that has been the staple of rocket scientists and put it in our creative arsenal? Without the need tobecome a rocket scientist or the headache of learning a new programming language like VHDL/Verilog. Why can't we just draw up the circuits that we want to use? With the right software and circuit libraries we can! Let's put a full circuit lab on a chip, pair it with an easy to use Arduino-Compatible chip, and sprinkle in a generous helping of debugging tools. Our dream is to take the hardcore out of FPGA (Field Programmable Gate Array) and make it an amazing tool that anyone can use for creative technology projects. Just like the Arduino team simplified C++ programming, we simplify FPGA design by providing easy to use drag and drop circuit libraries. We believe that drawing circuits will result in an amazing outpouring of creative FPGA projects! We start with the Arduino IDE (Integrated Development Environment) and supercharge it by adding circuits into the mix. We bring all of the pieces needed to draw and debug your very own circuits in one place. It's an easy and seamless user experience that we call Papilio DesignLab for use with both Windows and Linux. Want to get into more complex circuits? DesignLab includes the ZPUino Soft Processor with a Wishbone bus, providing greater speed and flexibility than the Arduino-Compatible chip. A Soft Processor runs inside the FPGA and uses the Wishbone bus to make it easy to connect peripheral circuits, such as UARTs, PWMs or SPI masters. Making your own Soft Processor with just the right mix of peripheral circuits is known as a SOC (System On Chip) design. With DesignLab you can draw your SOC designs in minutes! Create SOCs with ten serial ports, or a PWM on every pin, or something exotic like classic Atari and Commodore audio chips connected at the same time. The sky is the limit, you can create things that don't exist anywhere else! DesignLab Circuit Library Drawing circuits can only accomplish so much without a library of circuits (known as cores) to do the heavy lifting. Our goal is to provide the framework for anyone to write a core that can be wired into a circuit. We want to seek out the best open source circuits on the interwebs and convert them to a dead simple schematic library. The internet is absolutely full of open source circuits; just take a look at sites like OpenCores.com. You will find everything from classic audio chips to stepper motor controllers. All of these amazing circuits are within our reach when converted to schematic form and included with DesignLab IDE!
  7. Hi. I am new to FPGA design (but an experienced electronics engineer). I am learning how to create simple designs on a Papilio One 500k with ISE schematics. I am familier with basic logic design, and so far I have created some simple combinational logic and a divider chain to produce a 10Hz clock. This works fine, but when after editing and add more bits on, the existing parts no longer function properly. The frustrating thing is that the schematics look correct, but they do not function as expected on the FPGA. After searcing the internet for answers, I suspect it might be something to do with net names or constraints, but that's as far as I have got. Can anyone point me in the right direction (I cannot be the only beginner have these problems!)? By the way, I am aware there are limitations in using schematics (compared with using Verilog or VHDL). I am developing this project for my college students and there will be insufficient time for them to learn an HDL, although I will of course give them an introduction to the subject. Many thanks for reading this.
  8. Hi, I am new to this forum. I am running a course on logic design and I want to include a practical introduction to FPGAs. I am considering Papilio as the platform to use as there will not be time to learn VHDL or Verilog. My students are already used to using schematic design tools such as Proteus. We are using Windows 10. Is Papilio the right solution? I understand that Xilinx have superseded ISE with Vivado (which is more complicated and does not allow schematic entry). How does this affect Papilio and DesignLab? Many thanks.
  9. I just dusted off my RetroCade MegaWing and wanted to try the 1.3 Synth code, but I'm finding that things don't seem to be compiling in DesignLab. I tried the loading a newer example from GITHUB, and loading the bit file, but it does not get very far. It has been a while since I have used DesignLab, but I recall that I had this working smoothly in the past. That was on an earlier version of DL, and the RetroCade code was 1.1. Has anyone had the same problem using the RetroCade with a Papilio Pro?
  10. Hi All, I've been reading about the Arduino IDE on the web, particularly this article https://www.arduino.cc/en/Hacking/BuildProcess In the section "Build process" I found that the Arduino IDE puts the files generated from the sketches in a temporary folder \Documents and Settings\<USER>\Local Settings\Temp (on Windows) /tmp (on Mac and Linux) Since I am working on a non-gadget factory board (The Pipistrello 2.0) I have some special operations I need to do every once in a while which requires a copy of the output .bin file with the whole sketch. Wouldn't it be nice to have the compiler output files and binaries in a sub-directory of the designlab sketch file, like ./build or similar so that we don't have to cruise around the filesystem to find the binaries? I can imagine that one time or another you actually want to save the exact binary you programmed your device with and then it would simply be a matter of tarballing or zipping the folder? Best Regards Kalle Kempe
  11. So after installing that huge obsolete Xilink ISE WebPack Design tools which is what was needed to edit circuits for the Spartan 6 FPGA on the Papilio Pro, I went on to open the DesignLab IDE, click on new circuit, and then edit circuit to create and edit a new schematic when I get this error. The clicking of the edit button should have opened the ISE project navigator like in one these videos (https://www.youtube.com/watch?v=XHhU5JiKdUY) that show how to go about making FPGA circuits using the IDE. I am instead getting this error (see attachment), can anybody guess why? I have tried running the program as admin and I will try reinstalling the IDE, but I think the problem lies elsewhere.
  12. Hi, I'm workingt on getting started with the DesignLab and ISE workflow, and for that I'm trying to build a simple project without ZPUino. I created a new DesignLab project, edited the circuit in ISE, deleted the ZPUino and everything else from the schematic. I then built a minimal circuit with a clk_divider_30to1hz symbol from the Papilio libraries. I can create a bit file, upload it to the Papilio DUO, and after connecting two LEDs to the configured pins I have two LEDs flashing at 1 Hz and 8 Hz as expected. As a next step I'm trying to run the circuit in the ISim simulator, and I haven't been able to make that work yet. I created a new VHDL test bench, and I added a process for the CLK signal. When I'm starting the simulation, the following warnings appear when the simulation is built: WARNING:HDLCompiler:89 - "C:/Users/stm/Documents/DesignLab/divider/circuit/DUO_LX9/Papilio_DUO_LX9.vhf" Line 68: <clk_divider_30to1hz> remains a black-box since it has no binding entity.WARNING:Simulator:648 - "C:/Users/stm/Documents/DesignLab/divider/circuit/DUO_LX9/Papilio_DUO_LX9.vhf" Line 68. Instance clk_divider_30to1hz is unbound In the wave window the two outputs from the clk_divider_30to1hz symbol appear with an "U" in the "Value" column (see attached screen shot). If I understand it correctly, this means that the two outputs are uninitialzed. Is there any additional configuration necessary in order to run a ISim simulation for a DesignLab project that uses symbols from the Papilio libraries? My test project is also available via DropBox if someone is interested: https://www.dropbox.com/s/loctq3jnw0kz1av/divider.zip?dl=0 ThanksStephan
  13. Although current ZPUino timers implement a very complex and capable PWM system, we are struggling a bit to integrate PWM and Timer support at same time in ZPUino code. It's rather hard to mix both in a sensible way, because timers can have been claimed for other modules, and PWM may not always be able to map the correct pin, or map the correct timer, and fixing this in software will end up with a bit mess of code and bugs. So, after a quick chat with Jack a few days ago, we concluded that it would be better to have a separate PWM module from now on. But we are not entirely sure of what you users may need/want from such a module. I have spent last couple of days thinking about this, and I have come to a preliminary design which I'd like you to comment on. This design is based on my previous experience with a very PWM-capable generator - the Texas Instruments TMS320F series. I have borrowed some ideas from them, and my plan is roughly to have something like this (I have already implemented most of it, actually): -- Overall Module view - 16-bit counter, 8-bit prescaler. Up to 4 PWM compare/output blocks. - Each output block has 2 outputs. - Sync-in/Sync-out support for cascading more modules (if for example different timebases are needed) and to keep them perfectly synchronized. - Interrupt support. - Clocking block - 8-bit prescaler. Can divide the main clock by anything from 1 to 255. - Only meant to be programmed once. Subsequent programming may lead to glitches. - Per-module clock enable/disable. - Counter block - Three modes: count-up, count-down, and count-up-down - 16-bit period, with shadow register configurable. Phase counter for sync-in. - Compare block (up to 4 blocks per module) - 2 comparators (A and with 16-bit comparator. - Shadowing support - Output module (up to 4 blocks per module) - 2 outputs. - Each output configurable to both A/B comparators, zero or overflow. Can either set, clear, toggle or no-op on output pin. Comments ? Alvie
  14. File Name: Papilio DesignLab IDE File Submitter: Jack Gassett File Submitted: 12 Jan 2015 File Category: Papilio FPGA We live in exciting times where we can create masterpieces with the Arduino and marvels with the Raspberry Pi. Where we can use technology as a canvas to create things that amaze and amuse our friends and family. Wouldn't it be great if we could take the same technology that has been the staple of rocket scientists and put it in our creative arsenal? Without the need tobecome a rocket scientist or the headache of learning a new programming language like VHDL/Verilog. Why can't we just draw up the circuits that we want to use? With the right software and circuit libraries we can! Let's put a full circuit lab on a chip, pair it with an easy to use Arduino-Compatible chip, and sprinkle in a generous helping of debugging tools. Our dream is to take the hardcore out of FPGA (Field Programmable Gate Array) and make it an amazing tool that anyone can use for creative technology projects. Just like the Arduino team simplified C++ programming, we simplify FPGA design by providing easy to use drag and drop circuit libraries. We believe that drawing circuits will result in an amazing outpouring of creative FPGA projects! We start with the Arduino IDE (Integrated Development Environment) and supercharge it by adding circuits into the mix. We bring all of the pieces needed to draw and debug your very own circuits in one place. It's an easy and seamless user experience that we call Papilio DesignLab for use with both Windows and Linux. Want to get into more complex circuits? DesignLab includes the ZPUino Soft Processor with a Wishbone bus, providing greater speed and flexibility than the Arduino-Compatible chip. A Soft Processor runs inside the FPGA and uses the Wishbone bus to make it easy to connect peripheral circuits, such as UARTs, PWMs or SPI masters. Making your own Soft Processor with just the right mix of peripheral circuits is known as a SOC (System On Chip) design. With DesignLab you can draw your SOC designs in minutes! Create SOCs with ten serial ports, or a PWM on every pin, or something exotic like classic Atari and Commodore audio chips connected at the same time. The sky is the limit, you can create things that don't exist anywhere else! DesignLab Circuit Library Drawing circuits can only accomplish so much without a library of circuits (known as cores) to do the heavy lifting. Our goal is to provide the framework for anyone to write a core that can be wired into a circuit. We want to seek out the best open source circuits on the interwebs and convert them to a dead simple schematic library. The internet is absolutely full of open source circuits; just take a look at sites like OpenCores.com. You will find everything from classic audio chips to stepper motor controllers. All of these amazing circuits are within our reach when converted to schematic form and included with DesignLab IDE! Click here to download this file