@treadstone, yes, That is definitely one way to do it. I did try that though. However I am still unsure as to whether glitches can be caused by the problem you mentioned. @jack, could you upload the remaining files you have used as a reference in the project. There seems to be alot of files which are not found. Also , I am more interesed in using this like chipscope where I would like to call it in VHDL. Is there some files that need to be added? I already have a project. I dont want to bring out the pins on the papilio as logic analyzer pins. Instead I want to internally connect them to view it. Could you please help me out?