tomdehavas

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About tomdehavas

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  1. Alvieboy no I was wondering where reset was supposed to come from. There is no ZPUino. This is my own VHDL.I think mkarisson has the answer. The reset pin is not allocated and not in a ucf file so was presumably randomly allocated as suggested. I guess it was also left open and drifted depending on other factors in the code. Hence the unexplained sudden failures depending on seemingly unrelated changes! A bit like Heisenbugs in C! Thanks to both. I will post code at some point once I figure how to do it in a useful way. i.e. I don't want to post mess.
  2. I have been using a papilio pro with a OV7670 camera feeding a frame buffer made of block memory which is then used as the image source for a VGA generator driving the VGA wing. A simple change in the code from; outRGBWrite <= byte1(6) & byte1(4) & byte1(7) & byte1(5) & "00"; --Works! to outRGBWrite <= byte1(6) & byte1(4) & byte1(7) & "000"; --Fails! where; outRGBWrite : out STD_LOGIC_VECTOR(5 DOWNTO 0); and SIGNAL byte0: STD_LOGIC_VECTOR(7 DOWNTO 0); Clearly there was little logical sense in this change making such a difference. I eventually discovered that the top level has; reset: in STD_LOGIC; the value of reset is '1' at startup and then should make the transition to '0', however in the failed case it stays at '1' leaving the system in the reset state. Some of my code set initial values when reset was 1 then doing stuff with those values when reset went to 0. If it never went to 0 the system never started. FACT: I have been working with VHDL for approx 3 weeks so forgive me for not knowing where the reset signal comes from? QUESTION: My problem is solved by ignoring the reset signal and initialising the variables in their declaration rather than letting reset initalise them but the question remains, how is the reset signal being corrupted by the simple change to the lines above that are totally not connected to reset in any way.
  3. Hi I had the same problem, "Could not access USB device 0403:6010. If this is linux then use sudo" it was intermittent. Rebooting the computer seemed to help but it would fail after 10 mins or so. I found this forum and twoothers and tried the recommendations to no avail but then found at the end of this forum; http://embeddedprogrammer.blogspot.co.uk/2012/07/hacking-ov7670-camera-module-sccb-cheat.html The conclusion that the cable was the problem. I replaced my cable with a shorter one and it all worked! :-)
  4. Hi I had the same problem, "Could not access USB device 0403:6010. If this is linux then use sudo" it was intermittent. Rebooting the computer seemed to help but it would fail after 10 mins or so. I found this forum and twoothers and tried the recommendations to no avail but then found at the end of this forum; http://embeddedprogrammer.blogspot.co.uk/2012/07/hacking-ov7670-camera-module-sccb-cheat.html The conclusion that the cable was the problem. I replaced my cable with a shorter one and it all worked! :-)
  5. Just to add a very detailed description of the OV7670 appears at http://embeddedprogrammer.blogspot.co.uk/2012/07/hacking-ov7670-camera-module-sccb-cheat.html and although they are not trying to connect to an FPGA it gives very helpful information. I am working on connecting this camera to the Papilio Pro.
  6. Thank you everybody for your help and thoughts.
  7. Yes Yes Yes. Ok it would not work on three different monitors. I changed the timings for different resolutions but all monitors seemed to either say "out of timing" or just go to sleep. Looked at signal on scope and all timings looked correct. Finally set another machine to 640x480 and looked at signal on scope. Ah seems like I had swapped the vsync and hsync Now ofcourse it all works fine in all resolutions. In above Replace; NET RGB_VSYNC LOC="P123" | IOSTANDARD=LVTTL; # C8 NET RGB_HSYNC LOC="P124" | IOSTANDARD=LVTTL; # C9 With; NET RGB_VSYNC LOC="P124" | IOSTANDARD=LVTTL; # C8 NET RGB_HSYNC LOC="P123" | IOSTANDARD=LVTTL; # C9 Oh dear :-)
  8. Thanks OffRoad for your time and reply. Yes I am keen to follow RTL and have no intention of using Papilio as an Arduino. However I had assumed that the use of the name implied an easy startup process but it took half an hour to get the Arduino development environment running and two days for the Papilio substantually due to poor documentation. Your code is working with the VGA Wing (with a few pin changes) on my system, I can see it on my oscilloscope, but I don't have a 640x480 monitor! For other readers I have explained the process I went through below. I found references to 640 and 480 in the code and also variables for the porches sync pulses etc but could not see where to adjust the clock. (1) Is it easy to adjust the clock? i.e. to run 1280x1024 for example. Bare in mind I have never used any HDL before in my life so I would be unlikely to spot it myself. Yes I know I should read through some tutorials, and I intend to but there is nothing like hacking as a way to learn. (2) I like the Plan Ahead environment, is it the way things are going? Can I focus on it in confidence as the choice for the future or should I still be considering the ISE? I read about PlanAhead v. ISE from http://www.xilinx.com/tools/planahead.htm but it didn't really give an answer or are they simply to parallel approaches as you previously suggested? I'll tell you one thing. I enforced a rule about curly brackets in C/C++ in my company that any opening bracket must be on the same line or in the same column as its corresponding closing bracket. This creates a highly structured appearence in the code. The alternative is a collection of rules to deal with various statements in often subtle ways which when there are many levels of nesting over large blocks of code ends up, well, "ellaborate", shall we say. In Varilog of course there is "begin" and "end" so I was hoping the curly braces argument would disappear. But no, sadly for me when I looked at your code I see it hasen't! ;-) Eeek I think I will run to VHDL and hide ;-) Anyway please don't feel any need to give a serious reply to this point which is quite off topic. Below, just for the benefit of other readers here is how I got things going for the code as it stood to provide 640x480. Thank you for writing it and sharing it. Tom I typed sudo /opt/Xilinx/14.7/ISE_DS/PlanAhead/bin/setupEnv.sh to set the environment variables I typed sudo /opt/Xilinx/14.7/ISE_DS/PlanAhead/bin/planAhead to start the application On startup I got these "critical warnings" which I ignored. [Project 1-19] Could not find the file /home/tom/Computronics/Papilio/Xilinx/RGB/RGB.srcs/sources_1/imports/src/vga1440x900.vhdl. [Project 1-19] Could not find the file /home/tom/Computronics/Papilio/Xilinx/RGB/RGB.srcs/sources_1/imports/src/PLL106.v. In RGB/RGB.srcs/constrs_1/imports/src/RGB_papilioPro.ucf I changed the output pins so that the VGA Wing would work. I replaced; NET RGB_B3 LOC="P123" | IOSTANDARD=LVTTL; # C8 NET RGB_G3 LOC="P124" | IOSTANDARD=LVTTL; # C9 NET RGB_R3 LOC="P126" | IOSTANDARD=LVTTL; # C10 NET RGB_B4 LOC="P127" | IOSTANDARD=LVTTL; # C11 NET RGB_G4 LOC="P131" | IOSTANDARD=LVTTL; # C12 NET RGB_R4 LOC="P132" | IOSTANDARD=LVTTL; # C13 NET RGB_HSYNC LOC="P133" | IOSTANDARD=LVTTL; # C14 NET RGB_VSYNC LOC="P134" | IOSTANDARD=LVTTL; # C15 With; #My new pins to work with vga wing NET RGB_VSYNC LOC="P123" | IOSTANDARD=LVTTL; # C8 NET RGB_HSYNC LOC="P124" | IOSTANDARD=LVTTL; # C9 NET RGB_B3 LOC="P126" | IOSTANDARD=LVTTL; # C10 NET RGB_B4 LOC="P127" | IOSTANDARD=LVTTL; # C11 NET RGB_G4 LOC="P131" | IOSTANDARD=LVTTL; # C12 NET RGB_R4 LOC="P132" | IOSTANDARD=LVTTL; # C13 NET RGB_G3 LOC="P133" | IOSTANDARD=LVTTL; # C14 NET RGB_R3 LOC="P134" | IOSTANDARD=LVTTL; # C15 Then clicking on the "play" icons on the left enabled me to go through the process of running Synthesis, running Implementation and then generating Bitstream. The resulting file top.bit was then avalable to download to the papilio using I typed /opt/GadgetFactory/papilio-loader/papilio-loader.sh entered the file path which from the RGB folder is RGB/RGB.runs/imple_1/top.bit and then pressed the run button. All downloaded sucessfully but since this is for 640 * 480 I don't have any monitor that will work at this resolution!
  9. I have many years experience programming in C and doing electronics and simply want an example that I can load and run in the ISE and this looked great but has no .xise file which seems to be needed to load a project. It would be so nice to actuually have some projects to load without problems for my Papilio Pro. I have found that looking at code is a very good way to start but debugging code is not. I just feel sure there must be something that everybody didn't mention because its too obvious. Given the idea is meant to be that this is as well supportede as the Arduino, I think it might be worth while actually checking and perhaps re-writing the Quick Start pages so that they don't assume a bunch of steps. The writing should preferable be done by someone like me who is new to the Papilio and not well seasoned in Linux. Anyway overall I am having fun but I would love to just be able to download this RGB project load it into the ISE and use it. :-)