F6EEQ

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Everything posted by F6EEQ

  1. Xilinx ISE on Linux

    Hi all, I'm back after a long time (1 or 2 years??), but I would like to restart with FPGA. I have a Papilio pro, and I used it with Xilinx ISE with W10. It was working well, but now I wish to have it on Linux (Debian). I have the CD's, but it seems that these CD are only for Windows. Does anyone have experience with installing ISE on Linux? I'm not sure it is the good place to post, but I did not find any "general" forum tab. Thanks for your help. Gerard
  2. Xilinx ISE on Linux

    This confirm what I thought. Well.. It seems, I'll have to switch again to W, at least for FPGA!! Thanks and have a nice WE
  3. Xilinx ISE on Linux

    Thanks, but this download is > 5Go... . With my very poor DSL I'll need a week!! I tried Vivado, which is lighter, but was unable to install it on Debian because of Java problems...
  4. FPGA... what for?

    Hi all, This post is probably a dumb one, and you all will laugh at me, but anyway, I have to ask the question. First I'm not sure this is the right place, but moderator could freely move it to the adequate chapter. As you may see from two or three other posting, I'm not familiar with digital design, that's the least you can say. I have basic knowledge of general electronics from my ham radio experience, and I recently acquired some modest knowledge in µproc development, enough at least to understand what I'm doing and settting up some small projects. My problem is that I did not yet understood very well what to do with FPGA. I had a look at the projects described here or in Hamster wiki and the majority deals with VGA oriented tasks (games, display...). The only one I found to be of interest (for me!) are the logic analyser and the FM transmitter, but it's a little bit out of my reach, at least until I understand a little more. I'm currently reading the book "Digital Mc Logic" and I try to understand, but it's more about basic "mathematical" knowledge than practice oriented. I've also downloaded "Intro to Spartan..." and I recently ordered Papilio Pro to have my hands in the dirt, so I hope to understand how it works. I also went through FPGA4fun,which is interesting and relatively basic. But still I'm trying to figure out what I could start as a project, after I'm through with these introductions. I've thousand of ideas with a PIC/AVR, but I'm not sure it could be done with FPGA or even if it would be of any interest/progress to do so, and moreover I lack the hability to think in term of "logic circuitry". I hope to have been clear, and if you could help me or direct me on a good related/beginner site I would appreciate very much. Thanks for your support.
  5. Hi all,, I tried to use simulation, using the guidelines in Hamsters book. I have the test bench OK, but when I double click on "sumulate", I get an error message saying: "model technlogy vsim unavailable". When I go in "preference/tools" the first line is blanck, and I am not able to find the path to the simulator. I'm not sure it is installed. Any hints? Thanks.
  6. Trouble with simulation

    OK Jack and thanks. Now it's working. Not as I wanted, but this is another story!! At least I get some time frame and the clock ISE help is not very helpful in setting up all those things! Have a nice WE.
  7. Trouble with simulation

    OK Jack, but I tried and could not find where Isim is in the Xilinx directory. The line "Model Tech Simulator" is blank and if I click on "default", nothing's happening. I'm not sure that Isim has been downloaded with ISE.
  8. Hi all, Seems that I really do not understand and hopefully some great guru will explain. I read carefully the small ZPU codenamed "ZpuQuadDec" which I found elsewhere in the Showcase section. In the "zpuino_quadcounter" VHDL file there is the description of the wishbone in the "entity" part, and then further in the code, some of the wishbone bits or vectors are used. Output of the decoder (direction of rotation) is written in the WB_DATA_O vector, and some other bits are used to control the flow. I understand the logic of the VHDL code, but what I could not figure is how to retrieve in the "microprocessor" the WB_DATA_O value. I read carefully the ZPUINO-1 book written by Alvie, but I was unable to understand the link between the wishbone and the GPIO port, which is where I suppose the data are read/written. When you write a C code with the ARDUINO IDE, you use PPS and the other functions related to port definition, but this implies to define the pin you arec working with. Here in the VHDL code, I did not find any mention of pin or the like. May be I'm completely wrong, but the least I can say is that I'm lost :wacko: Could someone give me some explanation and/or a simple example ? Thanks for your patience and help.
  9. Always questions about wishbone!!

    Wouah!!! Long reading with lot of interesting stuff! I will try to go through this during the WE. Thanks for help, and be assured tha t i will annoy you another time
  10. Pro suitable for beginner?

    I had the same question some month ago, and the answer is YES !!! Basically there is no difference in the FPGA management between 200/500/PRO, but Spartan 6 has more possibility. The difficulty to learn will be the same (and believe me I'ts not so easy!!) but you will use the same software (XILINX ISE) and you use the same SOC (ZPuino) but with much more capacity. As the price is not so different I would definitely recommend PRO + Logic start Megawing. After it's up to you to make progress, but the forum is a great help thanks to very keen contributore as Jack, Alvie and Hamster to name only a few. I got my PRO in July, and I'm beginning to construct some easy projects and its a lot of fun ... and some headhakes too!! Softcore is OK, but it's a little bit difficult to apprehend in the beginning, although some example are provided, but you fire them without understanding all the ins and out. Best start is with Hamster book "introduction to Spartan FPGA". I'm not yet at the end, but at least it is progressive, interesting and does not require too much knowledge nor additional components than the LS. WIKIPEDIA is also a very good source (search easily FPGA). There is a very good tutorial, but it is in French langage... which is perfectly OK for me!!! Feel free to ask mor info. Have fun.
  11. Access to non wing pins

    How could you access with ZAP the pins which are not in the wings? Those are labeled WAx or WHAx, but if I wish to access to LED1 (FPGA pin P112), or the clock (FPGA P94) or any other valid FPGA pin how do I program PINMODE ??? I suppose this is the way to have a direct interface between FPGA (VHDL ports) and ZAP GPIO. I did not find the info in ZAP doc. Thanks
  12. Access to non wing pins

    Hi Technomancer, thats exactly what I wish to do. If there are no counter, I could do that with VHDL, but at a time or aothet, i have to cnnect this with the C program of the ZP, and thats where y problem is. I'm on business trip and I read this not really with much attention, and I will have a better look on the WE!!! Thanks to all.
  13. Access to non wing pins

    Hi Alvie, As far as I understood, the GPIO is OK to interface to a 2*16 LCD or some LEDS. Now my question is how to link the output of the encoder (VHDL signal) with the ZP. If I was using only FPGA and LS I would solely send this to a LED, but I want to use this to drive one ZP counter (as if I was sending something to timer0 in a PIC). So may be signal is not the right term, but this is the "variable" (I cannot find another word) which is telling which way the encoder is rotating, and which is generated by a VHDL process. If you have a look at the XILINX frequency generator schematic I spoke about in another post, I wish to do exactly that. I hope to be clear!! Thanks anyway for you precious help.
  14. Access to non wing pins

    I begin to understand all this and I have a specific question. To start with a small circuit I would like to implement in the FPGA (VHDL) a rotary encoder. This works very nicely, and I light the LEDS I wish on the LS wings. Now lets say I wish to use the output of this encoder to drive a counter implemented in the ZP and I output this counter on 7segs or LEDS on the LS wings. The LEDS or 7segs are wired to the wings via ZP GPIO and wing posts# (as explained in the ZP manual), but how do I link the output of the encoder (which is a signal in VHDL) to the GPIO (or at least I think that's where it has to be "wired"). I read carefully you example for a serial interface, but this is too much complicated for my understanding, and additionally, there is no practical example. Thanks to all for you help and patience!!
  15. LCD library

    Hello you who are already mastering the beast!!!!! I would like to begin a small project with the ZPuino and I have several questions. If I understand correctly, I must load the ZPU bootloader first, then the ZPU program written on the ARDUINO IDE, and then the VHDL sketch. My idea is to set-up a LCD display with ZPU (2 lines 80 characters) and to write some text depending upon the position of a/several switch(es) from the LS wing and/or light some LEDS. This will allow me to interface VHDL and ZPU program. Does the ZPU IDE accept the ARDUINO LCD functions? Of course adapted to the right GPIO. If I link directly a GPIO "pin" with a PPro physical pin, do I need to have a minimum UCF and VHDL sketch? Sorry to ask those questions, but the tutorials are not very precise. I would like to let beginners like me take advantage of my experience. Is there a way to write in detail what I did, without overusing this forum? May be in the new "learning site"? Thanks a lot to all.
  16. LCD library

    Thanks Jack. Hopefully a rainy week-end is forecasted, and I will have plenty of time to try this.
  17. Access to non wing pins

    Don't worry Jack, you'r doing wonderful work, and for the price we pay :D we may afford a little waiting!! Anyway I still have a lot to learn.
  18. Access to non wing pins

    Thanks Jack, OK for a wishbone. Seems a little bit over my possibility for the moment, but I understand the idea.
  19. LCD library

    Programmer is OK, and I do not wish to use VGA!!! I'd like to have some kind of standalone project, and so VGA and screen are banned!! Thanks anyway.
  20. LCD library

    Well, I should have tried better!!! I succeeded to blink a led on my LS with ZPUino. That's a first step I've still a question: I was unable to use the configuration "ZPUino 2 on PPro" because it was impossible to download the initialisation sequence. It worked only with ZP1 variant Vanilla (I did not try Hyperion). For info, a copy of the error: as appeared in the lower window of the IDE with ZP2 java.lang.NullPointerException at java.util.HashMap.putAll(HashMap.java:498) at processing.app.debug.BasicUploader.burnBootloader(BasicUploader.java:295) at processing.app.Editor$47.run(Editor.java:2540) at java.awt.event.InvocationEvent.dispatch(InvocationEvent.java:209) at java.awt.EventQueue.dispatchEvent(EventQueue.java:597) at java.awt.EventDispatchThread.pumpOneEventForFilters(EventDispatchThread.java:269) at java.awt.EventDispatchThread.pumpEventsForFilter(EventDispatchThread.java:184) at java.awt.EventDispatchThread.pumpEventsForHierarchy(EventDispatchThread.java:174) at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:169) at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:161) at java.awt.EventDispatchThread.run(EventDispatchThread.java:122)
  21. Encoder tests

    I tried the rotary encoder example from XILINX and I found a curious problem. I had my LS normally plugged, and I linked the encoder wires to the VGA plug because this was the only outlet easily available (on VSync and HSync) and they were pulled up high via the UCF config. It did not work. So after hard thinking, I decide to slide the LS in the "led and switch only" position on wing C, and to connect the encoder to some place in the free wing, UCF adapted but everything remaining the same. Suddenly everything was running well. I suppose the 2 serial resistors in the VGA connection (82 ohms) although small brought perturbation to the pull up circuit. I have another question to this circuit. In the VHDL sketch there are successive affectations: for insatance A<=B<=C to handle encoder signal and internal signals. I understood this is to add registers, and prevent glitches but the process is a little bit hard to understand. It was also explained in the encoder example of FPGA 4 fun, but it still difficult to me. Well, enough for today!!
  22. Case

    Papillo PRO since July. Not yet very fit with it, but i'm working!!
  23. Case

    I was looking for something like that!! Nice stuff. Personally I don't think you have to include the wings. Access to headers is OK and the underlying contacts are protected, which is most important. Any idea about availability,
  24. Frequency generator

    I don't remember where i found the link (somewhere in this forum!!) to a XILINX power point about a Frequency generator with MicroBlaze SOC. The presentation seems most interesting but i've been unable to find the VHDL sketches related to this project. On the presentation it is said to download it but there is no link, and I tried on XILINX site without any success. Could someone help me? Thanks.
  25. Frequency generator

    After some tries I think I succeeded loading ZAP sketch in the PP but nothing happens. I found the right com port I've burned the botloader (some leds light and the RX/TX leds light also). It is said (in the lower window) that this load is successfull. After I load in the IDE the Logic Start sketch, push "load" (in French this is "televerser") with the the arrow . The RX/TX leds do not light, but answer is Board: Unknown board @ 96000000 Hz (0xa4041700) Programming completed successfully in 41.70 seconds. But nothing happens, no light, no led... Well, I probably did something wrong but what? Is there some VHDL code to add somewhere? and UCF?