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About F6EEQ

  • Rank
    Advanced Member
  • Birthday 12/08/1950

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  • Gender Male
  • Location Romans (Drome, France)
  • Interests Ham Radio and electronic stuff.
    Gardening, hiking, riding bicycle
  1. This confirm what I thought. Well.. It seems, I'll have to switch again to W, at least for FPGA!! Thanks and have a nice WE
  2. Thanks, but this download is > 5Go... . With my very poor DSL I'll need a week!! I tried Vivado, which is lighter, but was unable to install it on Debian because of Java problems...
  3. Hi all, I'm back after a long time (1 or 2 years??), but I would like to restart with FPGA. I have a Papilio pro, and I used it with Xilinx ISE with W10. It was working well, but now I wish to have it on Linux (Debian). I have the CD's, but it seems that these CD are only for Windows. Does anyone have experience with installing ISE on Linux? I'm not sure it is the good place to post, but I did not find any "general" forum tab. Thanks for your help. Gerard
  4. OK Jack and thanks. Now it's working. Not as I wanted, but this is another story!! At least I get some time frame and the clock ISE help is not very helpful in setting up all those things! Have a nice WE.
  5. OK Jack, but I tried and could not find where Isim is in the Xilinx directory. The line "Model Tech Simulator" is blank and if I click on "default", nothing's happening. I'm not sure that Isim has been downloaded with ISE.
  6. Hi all,, I tried to use simulation, using the guidelines in Hamsters book. I have the test bench OK, but when I double click on "sumulate", I get an error message saying: "model technlogy vsim unavailable". When I go in "preference/tools" the first line is blanck, and I am not able to find the path to the simulator. I'm not sure it is installed. Any hints? Thanks.
  7. Wouah!!! Long reading with lot of interesting stuff! I will try to go through this during the WE. Thanks for help, and be assured tha t i will annoy you another time
  8. Hi all, Seems that I really do not understand and hopefully some great guru will explain. I read carefully the small ZPU codenamed "ZpuQuadDec" which I found elsewhere in the Showcase section. In the "zpuino_quadcounter" VHDL file there is the description of the wishbone in the "entity" part, and then further in the code, some of the wishbone bits or vectors are used. Output of the decoder (direction of rotation) is written in the WB_DATA_O vector, and some other bits are used to control the flow. I understand the logic of the VHDL code, but what I could not figure is how to retrieve in the "microprocessor" the WB_DATA_O value. I read carefully the ZPUINO-1 book written by Alvie, but I was unable to understand the link between the wishbone and the GPIO port, which is where I suppose the data are read/written. When you write a C code with the ARDUINO IDE, you use PPS and the other functions related to port definition, but this implies to define the pin you arec working with. Here in the VHDL code, I did not find any mention of pin or the like. May be I'm completely wrong, but the least I can say is that I'm lost :wacko: Could someone give me some explanation and/or a simple example ? Thanks for your patience and help.
  9. I had the same question some month ago, and the answer is YES !!! Basically there is no difference in the FPGA management between 200/500/PRO, but Spartan 6 has more possibility. The difficulty to learn will be the same (and believe me I'ts not so easy!!) but you will use the same software (XILINX ISE) and you use the same SOC (ZPuino) but with much more capacity. As the price is not so different I would definitely recommend PRO + Logic start Megawing. After it's up to you to make progress, but the forum is a great help thanks to very keen contributore as Jack, Alvie and Hamster to name only a few. I got my PRO in July, and I'm beginning to construct some easy projects and its a lot of fun ... and some headhakes too!! Softcore is OK, but it's a little bit difficult to apprehend in the beginning, although some example are provided, but you fire them without understanding all the ins and out. Best start is with Hamster book "introduction to Spartan FPGA". I'm not yet at the end, but at least it is progressive, interesting and does not require too much knowledge nor additional components than the LS. WIKIPEDIA is also a very good source (search easily FPGA). There is a very good tutorial, but it is in French langage... which is perfectly OK for me!!! Feel free to ask mor info. Have fun.
  10. Hi Technomancer, thats exactly what I wish to do. If there are no counter, I could do that with VHDL, but at a time or aothet, i have to cnnect this with the C program of the ZP, and thats where y problem is. I'm on business trip and I read this not really with much attention, and I will have a better look on the WE!!! Thanks to all.
  11. Hi Alvie, As far as I understood, the GPIO is OK to interface to a 2*16 LCD or some LEDS. Now my question is how to link the output of the encoder (VHDL signal) with the ZP. If I was using only FPGA and LS I would solely send this to a LED, but I want to use this to drive one ZP counter (as if I was sending something to timer0 in a PIC). So may be signal is not the right term, but this is the "variable" (I cannot find another word) which is telling which way the encoder is rotating, and which is generated by a VHDL process. If you have a look at the XILINX frequency generator schematic I spoke about in another post, I wish to do exactly that. I hope to be clear!! Thanks anyway for you precious help.
  12. I begin to understand all this and I have a specific question. To start with a small circuit I would like to implement in the FPGA (VHDL) a rotary encoder. This works very nicely, and I light the LEDS I wish on the LS wings. Now lets say I wish to use the output of this encoder to drive a counter implemented in the ZP and I output this counter on 7segs or LEDS on the LS wings. The LEDS or 7segs are wired to the wings via ZP GPIO and wing posts# (as explained in the ZP manual), but how do I link the output of the encoder (which is a signal in VHDL) to the GPIO (or at least I think that's where it has to be "wired"). I read carefully you example for a serial interface, but this is too much complicated for my understanding, and additionally, there is no practical example. Thanks to all for you help and patience!!
  13. Thanks Jack. Hopefully a rainy week-end is forecasted, and I will have plenty of time to try this.
  14. Don't worry Jack, you'r doing wonderful work, and for the price we pay :D we may afford a little waiting!! Anyway I still have a lot to learn.
  15. Thanks Jack, OK for a wishbone. Seems a little bit over my possibility for the moment, but I understand the idea.