veqtor

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About veqtor

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  1. Could I use the 2MB ISSI IS61WV20488BLL SRAM for framebuffering? I'd like to ideally hold more than one layer of 12-bit information at 640x480 with a +30hz refreshrate, I suppose that would require at least 20mhz of ops, can it keep up?
  2. HDMI would be really good, any chance of putting some more on the wing while you're at it? (if it's a mega wing, perhaps a USB host port, some stuff like that?)
  3. Would love to buy one or more if you get them!
  4. A wing with a video input and output would be really cool, video op-amps, dacs and adcs are all smt so its hard to diy on a piece of protoboard.
  5. A zynq board would be really cool! Wow!
  6. I'd be really interested in a pipistrello, I think a lot of us would be. The LX45 seems awesome. I work at a school, if they get manufactured by someone, I might convince the school to buy a lot to use as a teaching platform fpga-audio-dsp platform.
  7. The C64 still needs a SVF for it to be complete, but I found one at the fpga.synth.net wiki: http://fpga.synth.ne...n=FPGASynth.SVF Unfortunatly it's in verilog so I wouldn't know how to work it into the netsid code. Looking at the block diagram it seems to me it's just about right. Very little is known about the C64 svf, except it was vanillla and probably done with CMOS inverters and used a crude R2R dac as a variable resistor to control the cutoff. Putting more effort into emulation of that particular svf design could yield somewhat more authentic results but I doubt there'd be much of a difference tbh, what could account for some of character is the output dac from the chip and also the multiplying dac after the filter. Any DC offset on the pre-filter dac would make the filter do weird things while sweeping etc. looks like the bp and hp outs aren't implemented yet, but that should be easy enough... edit: just to clarify how to get the other outputs: HP out could be grabbed from this part: 3'd0: begin mA <= f; mB <= ((DataIn << 18) - mP - z2) >>> 17; end where HP is being sent to mB (multiplier b input). Take out that step and send it to a HP register besides sending it to mB. BP out would be pulled from here: 3'd1: begin mA <= f; mB <= z1 >>> 17; z1 <= mP + z1; end Besides sending mP + z1 back into z1, write it to a BP register. All that is left then is to make a MUX that sums the various outs so that notch (LP+HP) and such variants can be created. I hope this can be of some help!
  8. I've started building some OPLx sound generation in vhdl, but I've only come so far as to generate the special LUTs that are used for performing multiplications without multiplication, weird yes, crazy yamaha engineers that also did the soundblaster. The VHDL I'm trying to make will be compatible with ymf262 and also the one in the megadrive.
  9. okay I'll lower it, I was using SK Pang as a reference.
  10. Been doing some math and can't get I want to do to work on the Papilio one nor the Pro so I've decided to go the Altera route for a de0 nano that has low memory compared to pro but the 66 18x18 multipliers are very handy if you're doing dsp (reverbs) and super-high-res fm-synthesis (96khz 128x oversampled and 24-bit). So now I'm selling my papilio one 500k, never had time to use it so it's not even got the headers soldered onto it. Price is €45 so that's €10(?) off of the normal price + shipping from Sweden which is about €6 uninsured in europe. If this thread somehow violates the terms of use then please feel free to remove it. Wasn't sure where-else I'd find people buying a Papilio so... It's a shame because I've gotten into the xilinx tools but what can you do.
  11. Could you have data storage on the flash easily?
  12. So, is this board has SDRAM?
  13. So, it would be great to have a fritzing template to be able to build your own wings and megawings, any chance of this? see http://fritzing.org/
  14. Sounds like the built in delta-sigmas will be good enough for generating control voltage. I'll run audio in and out of the papilio using external adcs and dacs. My oscs will be somewhat SID-inspired but also take some cues from these cheap solutions on old Roland digital synths. For vcf I'm going to try building a cmos-inverter state-variable filter to get close to the Sid sound. Also I have my eyes on this programmable filter ic that implements a svf using switching capacitors. The goal is something like four voice synth similar to a sid with a built in sequencer.
  15. Cool, I really only wanted to use SD-ADC for reading loads of potentiometers but I guess I'll go for encoders, seems easier. I think I'll drop controlling an external analog VCO and do waveform synthesis for my project on the FPGA. One more question though, is the SD-DAC good enough, in your opinion to control an external voltage-controlled amplifier? I want to realize an external filter, perhaps with an external dac controlling a SVF or perhaps a steiner-parker filter and I'm considering using an analog VCA after and then it goes to the final output. Other solution would be doing an VCA emulation in the FPGA and that would open up for post-processing I guess. Thoughts?