Jack Gassett

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Everything posted by Jack Gassett

  1. Or try this bit file: 1.3.1 should be latest version with LCD fix. Jack.
  2. Hello Anthony, What version of the RetroCade code are you running? I think if you try the very latest version by downloading the DesignLab software and using that to upload the latest code you might see the problems go away. Jack.
  3. Hello Blake, Sorry for the slow response, I've been on a job which was running late every night last week and then Fathers day weekend this weekend... I should get some time this wednesday to take a look at this and help out. Jack.
  4. Hello Blake, Unfortunately I won't get much time to put together an example until next weekend so I will try to talk you through what you need to do. If you look at the image below (from the tutorial) you will see that the Wishbone_to_Registers_x10 symbol exposes the pads for 10 different registers. So anything you connect to them will be readable from your C code on the AVR. In the example below the input is connected to the output, this just means that the registers echo whatever to put in from the C code on the AVR. For your application you will want to remove those wires connecting the inputs to the outputs. Then experiment with connecting VCC and then GND to the register0_in and then verifying that you read back a zero or one from your C code. You can also wire the register0_out to an I/O marker (connected to a physical pin on the Papilio Board) and then verify that you can write to register0 in your code and see the physical pin has the corresponding change. You could then find the example that shows how to make a counter in the schematic editor and implement it and then connect the counters output into the register0_in. One important thing that I just noticed is that each register is 32 bits so it is not as simple as just connecting register0_in to an I/O marker or VCC or GND. You will need to connect those single signals to register0_in(0) or register0_out(0) and read the first bit of the 32 bit wide register. You will want to use a bus tap to accomplish that. There is a tutorial here. Once you get comfortable with doing this from the schematic editor then move on to VHDL. You will want to make a VHDL module that outputs your counter as a port at its top level. Start with making a module that just outputs a 0 or 1 from a port at the top level. After you have created the VHDL module (as a file included in your project) then right click on that file in your file hierarchy list on the left side of ISE and there should be an option to turn the VHDL file into a symbol. Once you successfully run the command to generate a symbol from your VHDL file you should then be able to find it in the symbol navigator and add it to your schematic. Then you connect it to the pads of the Wishbone_to_Registers_x10 symbol. Hope this gets you rolling in the right direction. Jack.
  5. In the meantime, try to comment out this section like it says: //Comment out this section for Papilio One. #ifdef __ZPUINO_PAPILIO_PRO__ #include <SD.h> #include "SmallFS.h" #include "modplayer.h" #include "ramFS.h" #include "cbuffer.h" MODPLAYER modplayer; #endif Like this: //Comment out this section for Papilio One. //#ifdef __ZPUINO_PAPILIO_PRO__ // #include <SD.h> // #include "SmallFS.h" // #include "modplayer.h" // #include "ramFS.h" // #include "cbuffer.h" // MODPLAYER modplayer; //#endif
  6. OK, I will try to take a look at this tonight and get back to you. Jack.
  7. I have never tried out the ethernet shield with the Papilio DUO so not sure what the problem is that you are running into... If you load a blank circuit to the FPGA side then there should not be any conflicts... You could also try to use one of these types of ethernet modules: http://store.gadgetfactory.net/ethernet-module/ Jack.
  8. Yes, I haven't visited that code in a while but I'm pretty sure what you are running into is that certain libraries are disabled for the Papilio One because there is not enough memory to support them. What are you trying to compile anyway, I can't really tell from your pasted information... It should say in the comments for the example what boards are supported. I think the Papilio One barely supported the Amiga mod player by itself, but definitely not with other players... That was the whole reason for the RetroCade light version. It was made for the Papilio One. Jack.
  9. Not everything will fit into the Hyperion version of ZPUino. Hyperion sacrifices some memory that was available for program space for video memory. The Papilio One does not have any external memory so it is very memory constrained compared to the Papilio Pro. Then Hyperion makes it even more so... I would recommend trying the regular version of ZPUino for the Papilio One and see if it works. If not then the Papilio One does not have enough memory for the example you are trying to synthesize. Jack
  10. This looks really cool, I can't wait until I get some time to dig into this and check it out some more. Jack
  11. Hello, The USB channel on the Papilio is a max of 3Mb/s so it will probably not be fast enough for what you are wanting to do. Alvie has created a USB wing that is a PHY and a USB core for the FPGA but it is just USB 1.1 I think so probably not fast enough. If we can get a USB 2.0 USB PHY wing then that would open up a lot more possibilities for projects like this one... Jack.
  12. Thank you for the understanding and I'm sorry we don't have a better answer. The material in the old ebook is still valid with the Papilio DUO, so it is still a great read... Jack.
  13. Hello RoelandK, I'm sorry but the eBook was never updated. Mike Field was going to do the ebook but right after the kickstarter finished he got hired on at a new job where he suddenly found himself with much less time to work on Open Source projects... We spoke about the book several times since, and he really wants to do the book, but he just does not have the time anymore... I'm sorry that was never completed, if you would like a partial refund or a store credit please send us an email at support@gadgetfactory.net and we will try to make this right for you. I have actually considered updating the ebook myself, but I think it would be after I finish up the next Papilio board and a new software suite to go with it since that will probably be the most beneficial to the Papilio community. After those are done then I think updating the ebook is the next step. Jack.
  14. Hello adamada, You should check all of your configuration settings. The easiest way to do that is to open the *.xise file and compare it to an xise file that is successfully generating a bit file that loads to spi flash. You have probably accidentally set the configuration to a quad spi chip or something... Jack.
  15. Hey Brad, The 5V rail is connected directly to the USB connector so you should be able to draw as much as the USB socket can provide. If you are powering from a USB socket then it is limited to 500mA unless you are connecting through a powered hub. The Voltage regulator on the 3.3V rail can supply a maximum of 600mA if I remember correctly. Jack.
  16. Hey Keith, that long 12" cable on the digital side is going to add resistance to the equation too. You might want to take a look at that next. Jack.
  17. Please take a look at the VGA section for the VGA circuit of the Computing Shield: http://papilio.cc/index.php?n=Papilio.ClassicComputingShield#vga This is probably the important part that is affecting your design: The VGA cable should be providing 75 ohm resistance. If you are not using a VGA cable with 75 ohm's then that might be why the colors look dim? Jack.
  18. DesignLab should also have some audio examples that will work with the LogicStart MegaWing audio output. They are ZPUino examples, not straight VHDL examples. Jack.
  19. The Papilio Loader should cause there to be a restart after the bit file is loaded... Maybe there is a bug in the Linux version, try to do a papilio-prog -C command and see if that forces the restart. For the multiple bit files, the spi flash supports that but there is no completed project yet to demonstrate that working... Jack.
  20. Hello, The digital joystick on the LogicStart MegaWing is super easy to use. It is just a digital logic '1' on each directional pin when you move the joystick in that direction. Here is the documentation with the ucf settings: http://papilio.cc/index.php?n=Papilio.LogicStartMegaWing#joystick Or download the LogicStart MegaWing ucf file: Jack.
  21. Hello Thomas, This looks very cool, I've been doing a contract job that is eating up most of my time. But hopefully I can give this a spin this weekend. Thank you for posting it, Dhia is going to get it up on the blog and social media tomorrow. Thanks! Jack.
  22. Hello Thomas, It sounds like you have a good handle on most of the details already. The voltage regulator can provide up to 600mA but a computer will only provide 500mA. If you need the full 600mA then connect through a powered USB hub. The esp8266 will burst up to 300mA when starting but uses much less when running. The piece of the puzzle you are missing is how much the FPGA will use, but unfortunately I cannot give you an easy answer to that. It is highly dependent on the design that you are running on it. There is an excel spreadsheet you can download from Xilinx that will look at your design and tell you what kind of power it will use... It can be super low, when I ran the XPower? spreadsheet on the OLS design when we were running it the estimate was only 10-20mA so we ended up using a 50mA voltage regulator in that design. It never had any power issues which validates that very low power usage for that application... Or it can be pretty high, just depending on your logic... The easiest way to tell for sure is to buy one of these Charger Doctors from ebay. Plug your Papilio into power through it with just your app running and see what the current draw is. Then do the same with esp8266 connected and you should have a very good, real world picture. Jack.
  23. Hello Thomas, Yes, it will continue with SDRAM, we have identified an ISSI SDRAM chip to use instead but there is still some work to be done to verify before we do the next run of boards. I'm also seeing if I can find a supply of the current SDRAM chips to do one more run of the Papilio Pro with the current chip. Jack.
  24. It's not retired but the SDRAM chip that is used is obsolete. We are looking for replacements which will take a little time... Jack.
  25. I don't think its a good idea to connect directly to ground... I think that drive strength is how much current it will provide through that pin under load. So put a load in by connecting a 1k resistor in series with your ammeter and then see what the current is... Jack.