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  1. Today
  2. I have ws2813b led strip, it is a type of digitla rgb led strip ,and the uper vision of ws2812 , could it be controlled with papilio duo ? and should i need special code for it? WS2813 LED.pdf
  3. Last week
  4. I've recently been playing with a TFT screen that has a plain RGB dot clock interface and got it working with a couple of the arcade games. I have a few small TFT displays that are capable of interfacing with the same method but they require initializing via the SPI interface to configure them to enable the RGB interface. One uses the SSD2119 chipset and a couple others are various ILI9xxx chipsets, all of which work similarly. Have any of you used one of these displays? I'm looking for a chunk of VHDL (ideally, but Verilog would work in a pinch) that will spit out a series of commands to initialize the display, anyone got something that already works? This seems like the sort of thing that would be out there but I haven't quite found what I'm looking for.
  5. Hello, I'm working on an implementation of the HACK computer from Nand2Tetris. My experience has been almost all on the FPGA side so far. I have written a working CPU with keyboard input and VGA output, and now I want to use the AVR as a kind of bootloader. My goal is to load the computer's software from a file on an SD card using the Arduino SD library and then stream it to the FPGA which will copy it into the SRAM. Once the program is transferred, the AVR should tell the FPGA to begin executing it. As a first step, I'm trying to get the CardInfo example to run and verify that it can read an SD card, but I haven't had much luck. My experience so far has been with Verilog programming in Xilinx ISE, so I'm completely new to Arduino programming. The card.init() call fails with SD_INIT_TIMEOUT. For now, I'm using a blank FPGA circuit. I suspect something is wrong with the Arduino pin assignments for the AVR and I'm not sure how to verify I have the correct pins. The example file only has a variable for configuring the CS pin: const int chipSelect = 4; The example file doesn't mention the SCK, MOSI, or MISO pins. I tried running CardInfo with the default value of chipSelect = 4. Then I tried chipSelect = 10. Neither of these values worked. I looked up the pin-out diagram here: http://papilio.cc/uploads/Papilio/Papilio DUO pinout for CC.pdf. This states that the chip select pin is D16. I'm not sure what this maps to in C++ code though; chipSelect = 16 did not work either. How can I determine what the correct pin number to use is? Do I also need to setup the SCK, MOSI and MISO pins somehow? Thanks! -Brandon
  6. Well, but you are looking at FPGA design from a fairly unusual viewpoint :-) Thinking pragmatically, an Artix-7 would make a new user's life considerably easier over Spartan 6 simply because it comes with Vivado instead of ISE. I don't think the user needs to know anything about the internal architecture - click the green arrow and out comes a bitstream. Of course this approach will hit some wall eventually, but at a surprisingly high level, possibly into the realm of VGA pixel clocks.
  7. Yes, it will have the jtag header which will be totally open for an external jtag programmer. Sent from my iPhone using Tapatalk
  8. Thank you for the quick reply and the info on Papilio Unity. Will it have provision for JTAG, even if just an unpopulated header? When I'm developing for FPGAs I like to blast a bitstream directly into the FPGA rather than program an SPI flash. If the target board doesn't have an FT2232D/H, I use a US$15 Adafruit FT232H Breakout Board as a JTAG programmer. It's basically a single-channel FT2232H. I'll miss Spartan-3E/A. But they're on the way out and Spartan-6 is now the "sweet spot" last time I looked. Spartan-6 is a very complex architecture which makes life extra difficult for the new user. Fortunately there's the Lattice iCE40 if you want a simple, easy-to-understand architecture :-)
  9. Thanks, you're right. I checked my board, it's D alright.
  10. I might look into doing another batch of Papilio One 250ks soon. But overall, I'm working on a new Papilio design that will replace the Papilio One and Papilio Pro boards with a single board called the Papilio Unity. This board will use much lower priced components and should get the price for a Spartan 6 based design hopefully down to the 250k pricing. It uses lower cost voltage regulators, the cp2104 USB to serial chip, and provides a socket for a memory upgrade. The trick with this board is that we don't need the expensive FTDI JTAG capable chip because we are making a boot loader, like the arduino has. Programming the SPI flash is much faster with this new board. It takes 20 seconds or so on existing boards and is 5 seconds on the new board. The design is working well and we are just getting everything in order before making the first batch. Sent from my iPhone using Tapatalk
  11. The Papilio DUO uses the FT2232H, which is great (high-speed USB, 480 Mb/s). The Pro uses the FT2232D (full-speed USB, 12 Mb/s). I don't have a Pro so I have no personal experience. I get 200 ms or so for the Papilio One 250K, which is within human reaction time. The 500K is more like 500 msec, which adds significant delay to compiling and loading a small design. This is with my Flavia software, so the compile step is less than a second for a small design.
  12. Hmmm... the old Papilios use the FT2232D USB chip, the newer ones (e.g. Papilio Pro) the FT2232H high speed variant. With a more recent board, uploads "should" be fast. I'm using high speed (30 MHz, clock divider 0) JTAG with the -H chip routinely. For xc3sprog, it may be enough to write cables.txt via command line option, then edit the clock rate. I think I've done that once and got upload times (but probably for a compressed bitstream) 200 ms or so.
  13. Is the Papilio 250K coming back some day? For a long time I've recommended it as the best value for getting started with FPGAs and I'd like to know if I should still be doing so. I was playing with mine today and I love it way it downloads so quickly.
  14. Earlier
  15. Here are some tutorials about arduino use, you can go and see! This is what big question. https://nextion.itead.cc/resource/documents/tutorials/
  16. Yay, glad you got it working. If you want to trade it out for a new one just send us an email at support@gadgetfactory.net and include a link to this forum thread. Thanks, Jack.
  17. Hi, you could check Trenz TE0725 with Artix 7 up to -100 size. I once had a Microblaze on one of them (was replaced later in the design cycle) and it definitely utilized less than 1/3 of resources. You'll want the Digilent-licensed "XMOD-FTDI" adapter to use the debugger (no idea how hard it is to set up with multiple targets, there is one JTAG option USER1-4 in the MB config that might be relevant). There is a 1.8 V variant, most likely 3.3 V is the better choice. To put it into perspective, it's probably 2x...3x the price of a Papilio. With Vivado on Artix I think you have more microblaze configuration options than on Spartan with ISE. Note: I'm not aware of any ready-made solution to access the memory module on that board. For the Papilios there are soft memory controllers, and Pipistrelly can use the hardware core that's bonded out on the larger FPGA sizes. And, for Spartan 6 there is some community but I haven't found that yet for Artix...
  18. thanks will see if i can get @vlait or @Jack Gassett to regenerate the base hardware with those changes and will modify RV to use the new file, and maybe make a base hardware file for superglob that has all 3 buttons mapped somewhere, as i dont have the ISE installed anymore do me a favor and don't distribute the romgen version without linking back and a note that its "as is" meaning i am not maintaining that fork as it does exactly what i needed it to. i sent the changes to the original author but he didn't see fit to add them into his main branch. i am glad you got it working. it was driving me crazy.
  19. At last i will make it work. First you need to uncompres the mame set jumpshot.zip or jumpshotp and extract in in ./roms/jumpshot or roms/jumpshotp directory Then execute the ./scripts/build_roms_jumpshot.bat or build_roms_jumpshotp.bat and créate the files in the ./build dir. Then edit the pacman_video.vhd and go to line 316 and comment the clk and ena lines (This modification fixes the gliches of super blob too, remaking the PROM4_DST.VHD and PROM7_DST.VHD with the "c" token instead the "r l e" one...) col_rom_4a : entity work.PROM4_DST port map ( --CLK => CLK, --ENA => ENA_6, ADDR => col_rom_addr, DATA => lut_4a ); make the same in the 424 line col_rom_7f : entity work.PROM7_DST port map ( --CLK => CLK, --ENA => ENA_6, ADDR => final_col, DATA => lut_7f ); edit pacman.vhd and go to he end to set the controls you like. p_input_registers : process begin wait until rising_edge(clk); if (ena_6 = '1') then -- on is low in0_reg(7) <= '1'; -- ? in0_reg(6) <= '1'; -- coin2 in0_reg(5) <= button_debounced(8); -- coin1 in0_reg(4) <= '1'; -- ?Reset in0_reg(3) <= button_debounced(1); -- p1 down in0_reg(2) <= button_debounced(3); -- p1 right in0_reg(1) <= button_debounced(2); -- p1 left in0_reg(0) <= button_debounced(0); -- p1 up in1_reg(7) <= '1'; -- ? Table 1=Up / 0=Coskctail in1_reg(6) <= button_debounced(7) and button_debounced(13); -- start2 y fire p2 in1_reg(5) <= button_debounced(6) and button_debounced(4); -- start1 y fire p1 in1_reg(4) <= '1'; -- Board Test in1_reg(3) <= button_debounced(10); -- p2 down in1_reg(2) <= button_debounced(12); -- p2 right in1_reg(1) <= button_debounced(11); -- p2 left in1_reg(0) <= button_debounced(9); -- p2 up -- on is 1 freeze <= '0'; dipsw_reg(7) <= '1'; -- ? dipsw_reg(6) <= '1'; -- ? dipsw_reg(5) <= '0'; -- 1 Credit 1 Play (0) dipsw_reg(4) <= '1'; -- Free Play (0) dipsw_reg(3) <= '1'; -- ? dipsw_reg(2) <= '1'; -- VGA hz? con 0 la VGA se ve mal. dipsw_reg(1 downto 0) <= "11"; -- Play Duration 01=2:30 11=2:00 / 10=1:30 / 00=1:00 end if; end process; Resintetize.... and play. If someone need help i will make my best. I dont have a papillo but have the same fpga. jumpshot.7z
  20. Nice that you got it working. Just make sure no one reads this as a recommended first-step response to a board that doesn't show on USB... My experience: I've thrown some of my own (boxed) FPGA designs across the lab and smashed them against hard surfaces under the pretense :-) of drop testing. Several dozens of units. While this led to mechanical design changes, I've never managed to break a crystal, or in fact anything electronic on a board. So I wouldn't be too worried about shock-sensitive crystals. To me, this seems a failure mode as likely as thousands of others.
  21. i used my romvault papilio edition to do it. but it wont work on base pacman driver because either the address lines or the data lines are swapped in the jumpshot cpu. easiest way is to get RV Papilio Edition and modify the xml file hashes for the roms for jumpshot and replace your hardware file (or add a new type) in the same xml file OR try to figure out how my pscript (between the <papilio> tags works from the xml file and run the command line manually https://github.com/FelixV/ROMVault-PapilioEdition/tree/master/ROMVault2 https://github.com/FelixV/ROMVault-PapilioEdition/tree/master/ROMVault2/Stage/papilio/patches/Arcade the version on the gadgetfactory download and gadgetfactory github site of romvault-papilio edition still uses a separate romgen (modified) which is able to read the ini files from the patches/Arcade/ directory so you can go that route no time to dig into it further at the moment, but if you cant figure it out, let me know and i see what i can do.
  22. What is the script to make the jumpshot roms? I cant make that game start with the pacmam driver.... I fixed some games gliches removing the clk and ena signals in the prom roms... If you say me how to run junpshot in the pacman driver i can try to fix gliches too.
  23. If got to same trouble in Windows (usually nothing happens when you try to run papilio-loader) go to c:\Users\..user_name..\AppData\Roaming\ and delete papilio-loader content preference file. Don't forget to end Java bin processes in Task Manager before running papilio-loader again.
  24. Help yourself! You may see my brand new Papilio DUO working with my brand new Crystal! Keep in mind that Crystals are shock sensitive and can be damaged during transport. In general - no sense to send forth and back the board for a quarter cost part as long as you know what you doing.
  25. Connecting the mini-USB cable to a comp. my Papilio DUO board powers up (Power LED lits up and a green 'LED' blinks), but no USB device appears in my Device Manager nor try even to connect a new one. I checked several cables (one I use in my LPC-Link IDE successfully) and several computers with Windows 7, 8, 10. When I switch to micro-USB, I get a port for AVR. Papilio-loader reports: 'Could not access USB device 0403:6010'. Of course . I see a couple of similar publications in Forum but a total miss of reaction to plugging USB cable didn't match. I will appreciate any help. P.S. 12MHz osc. of FTDI does not work. pin 36 SUSPEND# = 3,3V (active low when USB is in suspend mode) pin 60 PWREN# = 2,5V ( =1 USB SUSPEND mode or device has not been configured)
  26. I fixed paths (not yet on master) and generated a ZIP export file. Should work... not sure - fails on my side with: INTERNAL_ERROR:Xst:cmain.c:3464:1.56 - Process will terminate. For technical support on this issue, please open a WebCase with this project attached at http://www.xilinx.com/support. Care to try ? Your luck may vary... Alvie ZPUino_Papilio_One_250K_V2_blackbox_dist.zip
  27. I need to update that project file... I do have a script able to generate the .xise file from the main Makefile/prj. However links are broken since I moved stuff around. Will do ASAP... and fix all variants in the way (I did update the main project/boards ones, not all variants though). Alvie
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