MULTICOMP Z80 CP/M migrated to the Papilio Duo Platform

  • Hi folks, I wanted to share with you my recently completed Project using the awesome Papilio Duo platform wit the Classic Computing Shield. It's a migration of Grant Searle's brillant work called MULTICOMP, consisting in a flexible FPGA based architecture for implementing old style 8 bit Retro-computers using Z80, 6502 & 6809 "Soft-core" CPU's. You can take a look at the original Project, based on an Altera Cyclone II dev board, following this link: (Link to Grant's web site)







I've built the Z80 CP/M variant, complete with VGA & Keyboard terminal, Serial port, SD-Card and external SRAM. The steps I followed to accomplish this:

1. Adapted the pinouts, ports and some signals of all the modules (Main Interconect, Z80, VGA, Serial, Keyboard, SD-Card) from the original design to fully use the Computing Shield peripherals and the DUO's SRAM (using and updated Computing Shield UCF file).
2. Converted the original 6 bit color VGA to 12 bit color interface.
2. Converted the internal BIOS ROM and Character Font ROMs, to use Xilinx's Core Generator's Block Memory instead of the original Altera Altsyncram IP.
3. Converted the internal double port Display & Attribute RAMs also to use the Core Generator's Block Memory instead of the original Altera Altsyncram IP.
4. In my first attempt I adapter the CPU and Baudrate clock generators, to use the Papilio's 32 MHz OSC instead of the original 50 MHz, but I ran into timing problems converting the many clock -dependant constants in the design. So I decided to generate a new 50 MHz clock using the DCM & PLL Wizard.
Wherever possible I tried to maintain Grant's original VHDL & Z80 code, generating new signals and "wrapper" code to adapt to the different hardware. This way you can still refer to the original design as a rich learning experience, as every source code is available and well explained in Grant's website.
The final outcome is a very usable and complete Z80 soft-core based machine, running the venerable Digital Research CP/M 2.2 OS. The modular design concept  allows for extensive hacks and mods, even CP/M 3 and MP/M could be run (my next milestrone !).
Hope you enjoy it ! I've attached some pictures of my working system and the full VHDL ISE 14.7 Project tree files, including an already generated "bit" file for transferring it to the Papilio Duo with the Computing Shield attached (default serial port baudrate is 9600, 8N1 no handshake).

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For an easy stratup, I'm adding an SD card image with all the CP/M disks initialization allready done, with lots of preloaded programs, ready to use (thanks to Oscar Vermeulen from for this nice compilation of CP/M classics !) 

Drives A: thru D: and Users 0 to 9 available in this image. [ Link to image file ]

Enjoy !

Jose Luis.

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Great Job Jose!

The only problem I had was that I tied to use a 8GB SDHC card the first time, which didn't boot.  Then I tried a 2GB SD card and everything worked just like magic.  I even compiled and ran exmpl.c in the Aztec C directory successfully.  

Boy that brought back memories!  I still have my IMSAI "PC" out in the garage, but I haven't powered it up this century. 



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@Skip Thanks ! It's been a very satisfying experience building/programming to bring back these retrocomputers with 'new' FPGA technology.

There is an updated version of the SD Card VHDL code that supports SDHC cards, thanks to Rienk Khoolstra and Neal Crook.

When I get back home from my vacations next week I'll update my Upload.

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On 28/8/2017 at 6:20 PM, pperin said:


I cannot find a 2GB micro SD card any more.

Do you have a solution for a 8GB SD card ?

Thank you.



YES, thanks for asking. There's an updated VHDL module for SD-HC cards, use the file named "sd_controller.vhd.rienk" in the "Components" directory, rename it to "sd_controller.vhd" (delete the old version first) and recompile the full Project. This file should be in the original source code zip linked in my article; just in case I attached it here.

Let me know any problems; I've successfully used 8GB SDHC cards of many brands.

Regards, JL.


Edited by jlcollado

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Hi Jl,

I also took the project from Will Sowerbutts and modified it to run in the 64K of the FPGA it also as a FAT system with a RAM disk a Basic interpreter

It works on the Papillio PRO but not on the DUO ?

Pascal Perin




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