FPGA Discussions

108 topics in this forum

1. Simple Pulse Generator outputting pulse groups instead

   By MamboDee, June 17, 2015
   • 6 replies
   • 1,857 views
   • 
   • Jack Gassett
   • June 25, 2015

2. snickerdoodle $55 Open Source ZYNQ board on crowdsupply

   By nilrods, October 6, 2015
   • 13 replies
   • 3,391 views
   • 
   • james1095
   • October 12, 2015

3. so what about dsp slices then

   By Chris_C, November 30, 2013
   • 6 replies
   • 4,866 views
   • 
   • hamster
   • December 1, 2013

4. Software tools

   By Guest godfool, March 3, 2012
   • 5 replies
   • 641 views
   • 
   • Jack Gassett
   • March 7, 2012

5. Software/Hardware

   By luisfpl, October 23, 2012
   • 1 reply
   • 624 views
   • 
   • ben
   • October 23, 2012

6. Source control / ISE

   By jbb, January 14, 2013
   • 2 replies
   • 1,701 views
   • 
   • jbb
   • January 14, 2013

7. SPI to initialize TFT

   By james1095, August 21, 2017
   • 7 replies
   • 1,212 views
   • 
   • vaibhav.m
   • August 31

8. Starting with FPGA

   By Nishant Sood, August 20, 2012
   • 11 replies
   • 1,340 views
   • 
   • Jack Gassett
   • January 3, 2014

9. TCE (TTA based Co-design Environemnt)

   By OmniTechnoMancer, January 10, 2013   

   • softcore
   • TTA
   • (and 1 more)

     Tagged with:

     • softcore
     • TTA
     • TCE
   • 1 reply
   • 609 views
   • 
   • Jack Gassett
   • January 10, 2013

10. This is amazing!

    By Jack Gassett, April 2, 2013
    • 3 replies
    • 618 views
    • 
    • Jack Gassett
    • April 4, 2013

11. Timing constraints

    By jbb, January 8, 2013
    • 2 replies
    • 509 views
    • 
    • jbb
    • January 8, 2013

12. To Remove Debounce from MicroJoystick installed on LogicStart MegaWing (FPGA) and read input correctly

    By Kanupriya, June 21, 2014   

    • debounce
    • joystick
    • (and 1 more)

      Tagged with:

      • debounce
      • joystick
      • verilog
    • 2 replies
    • 1,081 views
    • 
    • mkarlsson
    • June 21, 2014

13. Unclocked processes

    By alex, February 19, 2013
    • 4 replies
    • 699 views
    • 
    • alex
    • February 19, 2013

14. USB to ps2

    By Chris_C, December 15, 2013
    • 4 replies
    • 1,053 views
    • 
    • james1095
    • December 16, 2013

15. Using FPGA - Am I right to do so?

    By truni, January 3, 2016
    • 16 replies
    • 1,719 views
    • 
    • Felix
    • January 7, 2016

16. Using IP cores in designs.

    By hamster, September 16, 2012
    • 3 replies
    • 728 views
    • 
    • alex
    • September 18, 2012

17. VDHL signal module question

    By nilrods, September 11, 2015   

    • VHDL module signal
    • 4 replies
    • 854 views
    • 
    • nilrods
    • September 14, 2015

18. Verilog Code Question from J1.v Papilio-Forth

    By craiglindley, August 6, 2012   

    • hdl
    • 2 replies
    • 1,027 views
    • 
    • craiglindley
    • August 7, 2012

19. vga controller gottcha...

    By Chris_C, December 13, 2013
    • 5 replies
    • 703 views
    • 
    • alex
    • December 17, 2013

20. VHDL newbie: 'if' on a process sensitivity list element

    By flag26838, September 20, 2014
    • 12 replies
    • 2,562 views
    • 
    • johnbeetem
    • September 22, 2014

21. vhdl problem with testbench

    By sam, April 1, 2014
    • 1 reply
    • 918 views
    • 
    • Matthew Hagerty
    • April 3, 2014

22. VHDL processes

    By Myndale, March 2, 2018
    • 2 replies
    • 816 views
    • 
    • Myndale
    • March 8, 2018

23. vhdl/xilinx ise questions: reusing chip code, automatic log() of generics and a PULLUP warning

    By flag26838, February 24, 2015
    • 3 replies
    • 1,258 views
    • 
    • alvieboy
    • March 24, 2015

24. What is Papilio?

    By Guest Inprogress, July 11, 2011
    • 5 replies
    • 1,508 views
    • 
    • fgimage
    • May 28, 2014

25. What is the best way to control RS485?

    By Yeezy, May 12, 2017
    • 3 replies
    • 2,175 views
    • 
    • Felix
    • May 20, 2017