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  1. Last week
  2. HighSpeedUART page is broken

    Hi there. The tutorial that ought to be here seems to have disappeared: http://papilio.cc/index.php?n=Papilio.HighSpeedUART
  3. I got my PRO!!

    And I got iRobot Roomba. I have read a lot of articles on https://best4yourhome.com/irobot-roomba-comparison/ and decided to buy it. I am fully satisfied.
  4. Loading Papilio Bram only project on papilio pro

    As a follow up, I noticed that the ucf callout for the usb_tx and usb_rx seemed to be reversed from the pro ucf so I switched them (not sure about why this worked). When I did, the arduino programmer did not error on the missing core but generated the following error which looks like it found the core but did not see what it wanted to see. error - Board: Unknown board @ 96000000 Hz (0xb4010f00) Cannot program flash on non-sector boundaries! I thought the Bram flash ( i assume this is the program space in the bram flash) would be placed in the same place in the core but maybe not - there must be some ID issue. I have attached the project if any one has a chance to take a quick look. Thanks again for any help. Howard Flash_SD_2.7z
  5. I have built a special papilio that is a clone of the papilio pro. It also has spansion flash chip that shares the address and data lines with the SD memory. I want to create a bram only zupino core that I load into the pro like board. This will free the address and data lines of the SDRAM. If I de select the SDRAM on the new board and select the spansion flash, I can then use i/o registers to transfer files from the SD card on the CL wing to the spansion flash. Then I will load the actual xilinx program that uses the flash directly with no papilio core. Is there a straight forward way to do this? My first attempt was to modify the papilio 500 project with SD cl wing and modify the ucf file to correctly connect to the pro Hardware. The xilinx loaded and verified, but the arduino load operation could not find the bram core?? error (Cannot get programmer version, aborting) I figured someone else may have tried this obvious modification of loading the smaller zupino bram only core on the pro board, but I couldn't find a reference in the forum search. Thanks in advance for any help. Howard Royster
  6. Is gadget factory moving sites or shutting down?

    Hey guys, I'm very sorry for the hassle, I'm not shutting GF down or moving websites. I started a new job and went through a very intensive two week training period with 14 hour days so there was no time left to look at forum posts here. The hosting for the downloads just happened to expire during that period and I didn't see the emails. I saw it once the training was over and everything should be sorted out now. Things should calm down going forward and I should settle into a routine where I can keep up with forum posts going forward. Once again, sorry for the hassle. Thanks, Jack.
  7. Program the ATmega32U4 without boot loader via USB

    Hey Paul, glad you got is sorted out. Sorry for the slow response. Jack.
  8. transform papilio duo 2Mb into 512kB project

    Hello Sandro, The only thing that is different between the 2MB and 512KB boards should be that in the 2MB board there is one extra address line that the 2MB chip provides. The circuit board is exactly the same, its just that on the 512KB board that address line connects to a pin that does nothing while on the 2MB board it gives access to more address space. Jack.
  9. Earlier
  10. Papilio Loader GUI

    How do I get the GUI for my Papilio Duo? When I click on the download links I get a weird error page that tells the Webmaster to contact Rackspace
  11. Is gadget factory moving sites or shutting down?

    Hi, I do not know what is going on. I can also not download the IDE.
  12. Hey there. Is gadget factory shutting down their site or moving to a different domain / host? I can't download designlab, and I the papilio duo quickstart page takes me to a hostgator 404
  13. Hi, Can you give a bit more details? on what you mean with 0-10V ADC. Are you talking about an analog signal (if so how fat does it change)? it is input or output from the DUO's perspective?
  14. I need to know how can we be able to communicate 0-10v ADC Digital output signals with Papilio DUO which is only operated on 3.3V, whether we should use voltage divider or Level shifter please suggest the best way
  15. New (potential) user

    Hi, I found the following videos quite inspiring https://fosdem.org/2018/schedule/event/cad_os_fpga/ https://fosdem.org/2018/schedule/event/cad_fpga_gui/
  16. Hi, I've been developping some for some time a programm for the Papilio Duo 2MB (I didn't started this project, and the person who did left). So far, everything works well. If i'm not mistaken, the only part of the board using the SDRAM is the ZPUino (Vanilla v2.0). I have less than 20kB of code, so using a 2MB Papillio is a bit overkill. Therefore, when I wanted to make a second such board, I ordered the 512kB version that is cheaper. The problem is that now only part of the functionnalities work (I'm doing a kind of PID contoler : the input stage and one of the outputs works, but the second output (with lower bandwidth but better resolution) doesn't work, even if I plug it on the same external hardware). I suspect that I missed some parameter to change when switching between 2MB and 512KB. For the moment, the only thing I found to change was the type of board in DesignLab. However, I suppose that there is also something to change in ISE? Would one of you be so kind as to explain me what I have to change? Thanks a lot in advance Best felix PS : in addition to the ZPU, there are also some pieces of VHDL and schematics I did (but that don't use SDRAM) and a few pieces from libraries (I see no reason for them to use SRAM either)
  17. Hi, The code up until the last part looks quite similar to that I have done. https://github.com/telamon/papilio-dspwing/blob/865e322b7eb3d761216595fead3c85fb294811ed/tremolo.vhd#L68 starts looking fishy. * Normally.. simply always use rising edges (and specially of the clock) * Your current process will only be "woken" up on a single bit transition(the control bit) but this will never happen unless you enable line 34 again.. https://github.com/telamon/papilio-dspwing/blob/865e322b7eb3d761216595fead3c85fb294811ed/tremolo.vhd#L68
  18. Hi! I'm trying to create a library based on the "Wishbone VHDL" sample i think. I'm currently stuck trying to write to a wishbone register, the ZPUIno just locks up while the vhdl-module continues to happily tick without any noticeable changes. I've cross-referenced my code with the simple writeLeds example but I really can't see anything that should cause this lockup, please help!. ( btw I'm on an Papilio Pro board ) Here's my code:http://www.pcbindex.com/ I can see the print of line 13 just fine, line 14 initiates the write, and then it gets stuck and I never seems to reach line 15 https://github.com/telamon/papilio-dspwing/blob/865e322b7eb3d761216595fead3c85fb294811ed/examples/simple_tremolo/simple_tremolo.ino#L15 which goes to: https://github.com/telamon/papilio-dspwing/blob/865e322b7eb3d761216595fead3c85fb294811ed/DSP_Wing.cpp#L33 <- how i perform the actual register write https://github.com/telamon/papilio-dspwing/blob/865e322b7eb3d761216595fead3c85fb294811ed/DSP_Wing.vhd#L98 <-- Here i try to receive/read. and finally.. https://github.com/telamon/papilio-dspwing/blob/865e322b7eb3d761216595fead3c85fb294811ed/tremolo.vhd#L68 <-- unpack and act upon the command. but that never happens either, so i can only assume that something went wrong with the register write inside the zpuino and that the changes to the register were never applied.
  19. Path of least resistance for beginner..

    Could it be related to your USB chipset not recognizing that particular port for some reason? Did you rename/copy the dll's in your xilinx installation in win10? That was key for me. That and the ZPUIno image, and "MegaWing_Logicstart" sketch.
  20. Path of least resistance for beginner..

    Thanks again. I am starting to get the horrible feeling my Papilio One has developed a fault in the 2-3 years it's been in storage (in an anti-static bag). I fired up a Windows 7 VM in VMWare Player, I can upload the sample .bit file to the flash memory but when I connect to COM1 I get nothing. I will try a few other files and see.
  21. Path of least resistance for beginner..

    Hm. Can't remember what I did specifically, but I think I used usbview.exe Looking further, I remember I had to replace something in the xilinx installation folders too, if memory serves: https://www.xilinx.com/support/answers/62380.html Something about replacing one dll with another file from the installation in a couple of spots. Definitely something along those lines. Cheers, Rob
  22. Path of least resistance for beginner..

    Thanks for your response. I am getting no serial port available and getting USB timeout issues when trying to transfer a .bit file. I have tried the tip of deleting the Papilio drivers and using the W10 ones, but not getting any further.
  23. Path of least resistance for beginner..

    Which part are you stuck on? I vaguely recall some 3rd party USB utilities I used in this process.
  24. Path of least resistance for beginner..

    Be interested to know how you got around those Windows 10 issues. It is fighting me every step of the way!
  25. New (potential) user

    Hello all, thinking of picking up the Duo with a LogicStart shield. I'd like to possibly integrate with my Arduino classes at the HS level in conjunction with FIRST robotics - Our current learning platform is Arduino Uno based. I have a EE background with embedded programming experience but minimal FPGA design experience. I've read thru much of the VHDL intro (e.g. Freerange VHDL) and it seems fairly intuitive. Questions: Are there any issues with Windows 10 and any of the EDAs for this or other Gadgetfactory boards/FPGAs? Any idea when the larger boards (e.g. 2M Duo) will be available? Any other advice? Many thanks, -Chris
  26. wishbone address bits

    Hi, I can see how this might be useful if you want word aligned memory access indeed. In the example I posted above only a single bit is used to discriminate so I think something else might be going on. https://github.com/GadgetFactory/DesignLab_Examples/blob/master/libraries/ZPUino_Wishbone_Peripherals/COMM_zpuino_wb_UART.vhd#L251
  27. wishbone address bits

    I would guess the reason for the "downto 2" is that the bus address is in word (32 bit) units while the addresses seen by code are in byte (8 bit) units. Thus, with "26 downto 2", the numbers of the bits more closely correspond with the processor address space, i.e. wb_adr_i(10) will be byte 1024 (2**10). At least that's why I did the equivalent in my own 32 bit design.
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