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Just a quick comment that to generate a slower clock, a preferred method is to use a synchronous counter. This type of counter has all counter flops clocked by the same high speed input clock and fits well with the way that FPGAs handle clocks. It is also the way that this type of circuit would be designed in an ASIC. Here is some code I wrote recently (as an example). It divides 315MHz from a PLL to 3.57MHz. A divide by 88 is required. reg [6:0] pll315_counter; reg clk357; // create 3.57MHz NTSC clock by dividing 315MHz by 88 always @ (posedge w_clk315) begin clk357 <= (pll315_counter<7'd44); if (pll315_counter==7'd87) begin pll315_counter <= 7'b0; end else begin pll315_counter <= pll315_counter + 7'b1; end end You would need to change the counter length, termination count and half count to suit your frequencies. I should have really used constants (such as tick defines) rather than hard code numbers, but hey this is my personal hobby project 😃
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Hi James, Thanks for your reply. I re-positioned the picture by setting the VGA_Invert.vhd constant Horizontal & constant Vertical variables settings. Thanks for the website you recommended. I will try to understand something there.
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I'm afraid I can't be much help there, I never tried to invert the video, I've always just left it whichever way the original game was. Most arcade hardware has the ability to flip the screen for cocktail mode though so it should be a matter of just inverting whatever signal controls that in the game to flip the screen. Are you sure the monitor isn't just adjusted so that text is off the screen? I highly recommend reading Free Range VHDL http://freerangefactory.org/ It's free and was a big help to me when I was starting out. You will really need to learn VHDL (or Verilog) in order to get much out of your FPGA board, using only existing projects without being able to modify them is extremely limiting, once you know a bit of VHDL you can understand how they work and tweak things as needed.
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I asked around and realized that having the clock go through an inverted d flip flop divides the clock in half. I need 23 flip flops much like your 23-bit counter Thank You!
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James, thanks for replying. I don't think it's part of the project. As you may already know I am new to this FPGA thing. I downloaded it many times from GitHub and managed to make both Pacman and Space invaders work. The problem was that they are opposite to each other on the screen and you have to turn the monitor the other way round. Then I saw a thread on the forum named Video inversion for Invaders for space invaders by Marco. The problem was I could not create the u_invert file for it. But finally I managed. Now the only problem I found is that the words ( SCORE<1> HIGH SCORE SCORE<2> ) are missing from the top of the screen. Thanks
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No, the CMT can't do that. If some part of the logic needs to advance at a slow rate, the common way to do that is to use a clock-enable signal, i.e. clock the logic with the system clock (say 32 MHz) and then generate a clock-enable signal using a counter (in your case a 23-bit counter) that resets at the period you want (in your case at 6399999). The clock-enable signal is true when the counter is at the max value (in your case 6399999) and is used to qualify the clocking of the slow circuit. Hope this helps
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HELLO all, just started my papilio journey and I need to reduce the 32MHz internal clock down to just 5Hz. I tried reading materials about the CMT (clock management tile) but just got more confused. thank u Mar
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recapta V1 is shutdown when trying to create account
Henry Alonso replied to kvintus's topic in Gadget Factory
It has been fixed ! -
Henry Alonso joined the community
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Right click in the project hierarchy, select New Source, then select IP Core Generator and from there you can create a memory. I'm not quite sure what you need that for though, is it not already part of the project? I'm pretty sure I have Space Invaders for both of the earlier Papilio boards somewhere, it's a project that I have ported to a number of different FPGA boards I have as sort of a "Hello World" type thing as it's known working code that is fairly simple to work with.
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Very well done both of you, I understand that Jack was upset about people buying knockoffs. But unfortunately I have bought both Original Papilio Pro & Mega wing from Jack, I guess! (Factory Gadget that is) I hope. My only reason I bought them is that I love arcade games which I got some help from James on a particular game. But later I needed some help on how to create a memory core to be called u_invert, to compliment the VGA_Invert.vhd for space invaders, and all I got is nothing even from Jack himself. Where is the support?I am still waiting. Thanks.
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Piotr SÅ‚onimski joined the community
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Hallo all, I was very impressed seeing the linux kernel booting on ppro in your video, I downloaded the github repo with Linux3.7-zpu, but I have still big problems to get it compiled and I also couldn't find the source of zbflt-loader and zlinux-loader to get it running. Maybe someone has some useful tipps or a short tutorial. Thanks in advance
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Any chance you'd consider doing a small production run of the add-on boards ?
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Cool! Yeah, winter is Sweden is not for the faint. As for Arty, I do have one too, and to make it a bit more useful I designed a pmod add-on board with the stuff missing compared to Pipistrello.
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Looks and sounds fantastic, good work there! I’ve been taking a little break from my project as I came down with tonsillitis and been feeling very sore and drained. Also the weather’s been very depressing as we head well into autumn, it’s been foggy all day every day for over a week now from morning till evening. I feel like I’m living in the Silent Hill movie. Overall it looks pretty cool but I haven’t seen the sun in a while and I miss it.
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Hi all! i started with a papilio pro a couple of years ago (2016) and everything worked fine. doing other things in the meantime, i again (2018) decided to dive into it with a specific project. i downloaded the latest designlab 1.0.8 and papilio downloader 2.8, again everything worked fine until a week after installation !! suddenly i cant open or save a file anymore, when i try designlab close down immidiately, also papilio loader does not start (no error messages) The thing is, i can start designlab and open a projectfile via filemeny>sketchbook>"existing file" and edit it ,download to papilio pro and everything works.(the file will be saved when i exit designlab) but as soon as i try 'open' or 'save as' designlab closes without saving ('save' seems to work) and neither compile or download buttons saves the file. (i am running all programs as admin) greatful for any tip
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Hi, Wow, I'm surprised that this forum is so silent. I would have thought that there would have been a lot more interest in this elegant processor. I have been looking for a small CPU that might fit in a few hundred LUTs on a Lattice Crosslink FPGA, and I wonder if the J1 might be small enough. Has anyone tried the J1 on one of the little Lattice FPGAs, like the Crosslink, Machxo3, etc? Hugo
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Most issues now fixed, like intro music and intermission music. Complete project can be downloaded here: https://github.com/Saanlima/Pipistrello Doom first level video (youtube)
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Got the OPL2 integrated into the Doom project. Still a few rough edges but getting close... Doom on FPGA board (youtube)
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Can anybody help please? How do you generate a memory core? (u_invert) thanks
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I know what you mean. I have an Arty board that I bought two years ago but haven’t used it yet. The closest I’ve been to Örebro is Eskilstuna which is where my sambo’s mom lives. PS the 1942 arcade game is now complete, works on Pipistrello. You can get if from my GitHub in link above.
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Well, I do have a github account but have been bad at updating it. The opl3 code for pipistrello can be downloaded here: http://www.saanlima.com/download/pipistrello-v2.0/opl3_pipistrello_lx45.zip The latest doom bitfile for pipistrello is here: http://www.saanlima.com/download/pipistrello-v2.0/doom.bit The latest doom c source code is here: http://www.saanlima.com/download/pipistrello-v2.0/mb_doom_sound3.zip Without support for Spartan6 in Vivado and no more updates for ISE, the old Spartan6 boards are unfortunately getting obsolete, and with the subsidized pricing of the Digilent Arty boards etc. there is very little incentive for me to develop Artix7-based replacement boards Kalmar is a nice place with a castle and all. We have an apartment in Örebro that we use as a home base in Sweden.
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Wow that sounds like a lot of work, well done. Do you publish your sources for these kind of projects (do you have a repository somewhere, like I do on github) ? I see the Pipistrello 2.0 has been discontinued, too bad, I think it was a great dev board and I still use mine due to the size of the LX45 and the built in sound/HDMI connectors. Have fun in Sweden, I live in Kalmar but I work in Mönsterås.
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An automated Papilio build environment with Cloud9 IDE in Docker
Thomas Hornschuh replied to Jack Gassett's topic in Papilio General Discussion
Awesome. I will check it in the next days. -
I think I nuked too many files in the ipcore_dir folder for it to compile so I just downloaded the whole project again, this time with all the files. If you have problems building it just re-download the zip file. Magnus
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Awesome! Thanks for sharing, I'll have to give it a try.
