1. Papilio Platform

    1. Papilio General Discussion

      For topics that apply to both the Papilio One and the Papilio Pro!

    2. Papilio Pro

      New Papilio Board that adds a Spartan 6 and SDRAM to the Papilio One footprint.

    3. Papilio One

      Discussions about Papilio One Gadget Board.

    4. Papilio DUO

      FPGA and Arduino together at last!

    5. Papilio Wings

      Papilio Wings are Open Source peripherals that snap into the Papilio for easy extendability.

    6. DesignLab IDE

      DesignLab IDE lets you draw FPGA circuits without learning VHDL/Verilog. (Formerly ZAP IDE)

    7. DesignLab Libraries

      Talk about libraries for DesignLab. Whether you are making them or using them, this is the place to discuss or request new libraries.

    8. RetroCade Synth

      Chiptune synthesizer with C64 SID, YM2149, and POKEY audio chips.

    9. Papilio Arcade

      The Papilio Arcade Kit is a DIY kit thatprovides everything needed to recreateclassic Arcade games such as Pac-Man.Open Source HDL projects provide thehardware definition for study,implementation, and extending.The Papilio Arcade Wing provides, 12bitVGA, Delta-Sigma Audio, and DB9 Joystickports.

    10. Papilio Loader Application

      The Papilio Loader Application collects all of the functionality of the Papilio One into one installable application.This is still a work in progress.

    11. Papilio Logic Sniffer

      Discussions about using the "Sump" Logic Analyzer with the Papilio Boards

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  2. Electronics

    1. Modules

      Electronic Modules that can be used with the Papilio.

  3. Soft Processors

    1. ZPUino

      ZPUino is an implementation of the 32-bit Open Source ZPU processor. It is a small implementation that is meant to be used with the Arduino IDE. It is capable of speeds up to 100Mhz and can run on the Papilio Platform.

    2. J1 Forth

      Discussion about the awesome J1 Forth Processor made by James Bowman.

    3. AVR8 Soft Processor

      The AVR8 Soft Processor is an Open Source RISC processor that implements all the registers and instructions of an ATmega103 processor. It supports the avr-gcc toolchain for compilation of ANSI C code.

  4. Community

    1. Gadget Factory

      Gadget Factory discussions. Have ideas to make Gadget Factory better? Having problems with the website? Let us know here.

    2. Documentation

      Request any FPGA, VHDL, or Papilio related tutorials. We will do our best to write as many as we can.

    3. FPGA Discussions

      Ask FPGA questions, share FPGA knowledge.

    4. Community Projects

      Got an idea for a project, talk about it and even work on it with other members of the community.

    5. Pipistrello

      Papilio on Steroids board developed by Saanlima Electronics.

      This is not produced by Gadget Factory but is a very interesting board we are happy to be associated with.

  5. Open Bench

    1. Open Bench Logic Sniffer at Dangerous Prototypes   (8,542 visits to this link)

      Discussions about the Open Bench Logic Sniffer on the Dangerous Prototypes Forum.

    2. OpenBench Logic Sniffer at Gadget Factory

      Discuss your OpenBench Logic Sniffer

  • Recent Topics

  • New Downloads

  • Recent Posts

    • Running ZPUino_Papilio_DUO using a different on-board oscillator
      Hi, I am trying to use ZPUino on my own custom board. I've picked ZPUino_Papilio_DUO blackbox, created a top level module accordingly and finally modified the .UCF file. As my board has a 24 MHz crystal oscillator, I instantiated a DCM block and converted 24MHz to 32MHz and fed the clk_32 signal (output of DCM) to ZPUino_Papilio_DUO_blackbox. After a successful synthesize, In the Translate step I got the following error: logical net 'XLXI_82/clk_32' has multiple driver(s): pin CLKFX on block XLXI_82/inst_clk_24to32/dcm_clkgen_inst with type DCM_CLKGEN, pin PAD on block XLXI_82/clk_32 with type PAD I also disabled the BUFG on DCM to see if this is the source of error, but still no chance! any help is appreciated.
    • Writing to an SD card and logging via FTDI usb port
      Any link to the working code? I would like to port it to very small FPGAs like iCE40. Thanks
    • socz80: A Z80 retro microcomputer for the Papilio Pro
      Hi all,  last November I received my Papillio Pro. One of the projects I immediatly tried out was  Will Sowerbutts SOCZ80. I really liked it, especially I started my computing experience with real CP/M computers in the beginning of the 80s. This included writing an own BIOS, etc. My old CP/M computer exists, but is not usable anymore because over the years all floppy disks get lost. So working with SOCZ80 was a exactly what I searched for. In the meantime I did a lot of extension to it: - Integration of a text mode video controller from open cores,interface_vga80x40
      - PS/2 keyboard
      - Adapted to use the Arcade Megawing for PS/2, VGA, GPIO LEDs, reset button
      - Extended CP/M 2.2 BIOS and MPM XIOS to support PS/2 and VGA.
      - ROM Monitor and boot loaders that can be used with VGA/PS/2 - so my extended version can be used as real stand-alone Computer when connected to power suplly, monitor and keyboard
      - The simulated terminal supports ADM3A/TVI950 escape sequences instead of VT100. They are easier/smaller to implement and many CP/M programs have difficulty to generate VT100 seqeunces. The disadvantage is that the local console is incompatible with the serial console, because I'm not aware of any Windows Terminal Emulator supporting ADM3A
      - The keyboard supports Wordstar compaitble Control characters for cursor keys. 
      - For MP/M Console 0 is the Serial UART and Console 1 PS/2 / VGA.  Other hardware / Software extensions: - Added support to Interrupt Mode 2 to the hardware and adapted MP/M XIOS to it (this allows the use of normal CP/M debuggers under MP/M without crashing the systems because the XIOS is no longer using RST7 for interrupts)
      - Fixed a bug in BIOS/XIOS with not taking into account that a CP/M DMA buffer can cross a 4K boundary. This occaisonally lead to data corruption e.g. when copying a file with CP/M PIP.COM Software: I also wrote a xmodem receive program in Turbo Pascal which makes transfering files a bit more easier.
      I collected a lot of old Software like Wordstar, Mutiplan, CBASIC, MBASIC, Turbo Pascal, Microsoft Fortran etc. and configured it to run with the Video Terminal. 
      I created some example programs in Turbo Pascal, MBASIC, CBASIC and even Fortran (it was the first Fortran program in my life -really fun :-) ).
      I also collected things like Eliza and Startrek. I also adpated the MBASIC Startrek to compiled CBASIC.  I sill plan to do more. E.g a improved video controller supporting higher resolutions, virtual console support  for MP/M. My focus is currently on the MP/M implementation, because MP/M was beyond my reach in the 80s and I'm really fascinated by the elegance and power of this little multi-user/multi-tasking system. I support CP/M as bootloader and "maintenance mode" for MP/M, but currently have no plan to support CP/M 3.0
      I'm currently in preparation to publish my extended SOCZ80 also with some disk images. Biggest limitation of the current implementation maybe that I only adapted it to German Keyboard Layout. This can be easily changed.
      My pre-anouncment here is mostly intended to find out if there is anybody out there interested in my work and also I'm searching for someone acting as tester to check if my distribution files (FPGA bitstream and disk images) are ok.  Looking foward to any reply. Regards Thomas 
    • HOW-TO: Papilio Duo and Xilinx ISE 14.7 on Ubuntu 16.04
      Look nice Brandon, I'm going to make this a sticky topic. Thanks! Jack.
    • Driving a YM2151 FM synth chip
      Over one year has past since my previous post. Things like this happen in home projects, I guess. I was able back then to sort out the mistery of the YM3012 by measuring the actual device. The verilog implementations that were published back then were indeed slightly mistaken. I published an entry on my blog about it (mostly in Spanish). I have started to dump the output of the real chip in order to reproduce it as accurately as possible in the Verilog implementation I am working on. I read the digital data directly, before going through the DAC. The attached image is a sample sound of my first note out (read this blog entry for details). I have also found the exact algorithm used to generate noise in the YM2151, again in a different blog entry. I hope nothing will disturb me this time and I will complete the new verilog implementation of the YM2151/YM3012. I will release it to opencores when done, with English documentation and comments.