1. Papilio Platform

    1. Papilio General Discussion

      For topics that apply to both the Papilio One and the Papilio Pro!

    2. Papilio Pro

      New Papilio Board that adds a Spartan 6 and SDRAM to the Papilio One footprint.

    3. Papilio One

      Discussions about Papilio One Gadget Board.

    4. Papilio DUO

      FPGA and Arduino together at last!

    5. Papilio Wings

      Papilio Wings are Open Source peripherals that snap into the Papilio for easy extendability.

    6. DesignLab IDE

      DesignLab IDE lets you draw FPGA circuits without learning VHDL/Verilog. (Formerly ZAP IDE)

    7. DesignLab Libraries

      Talk about libraries for DesignLab. Whether you are making them or using them, this is the place to discuss or request new libraries.

    8. RetroCade Synth

      Chiptune synthesizer with C64 SID, YM2149, and POKEY audio chips.

    9. Papilio Arcade

      The Papilio Arcade Kit is a DIY kit thatprovides everything needed to recreateclassic Arcade games such as Pac-Man.Open Source HDL projects provide thehardware definition for study,implementation, and extending.The Papilio Arcade Wing provides, 12bitVGA, Delta-Sigma Audio, and DB9 Joystickports.

    10. Papilio Loader Application

      The Papilio Loader Application collects all of the functionality of the Papilio One into one installable application.This is still a work in progress.

    11. Papilio Logic Sniffer

      Discussions about using the "Sump" Logic Analyzer with the Papilio Boards

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  2. Electronics

    1. Modules

      Electronic Modules that can be used with the Papilio.

  3. Soft Processors

    1. ZPUino

      ZPUino is an implementation of the 32-bit Open Source ZPU processor. It is a small implementation that is meant to be used with the Arduino IDE. It is capable of speeds up to 100Mhz and can run on the Papilio Platform.

    2. J1 Forth

      Discussion about the awesome J1 Forth Processor made by James Bowman.

    3. AVR8 Soft Processor

      The AVR8 Soft Processor is an Open Source RISC processor that implements all the registers and instructions of an ATmega103 processor. It supports the avr-gcc toolchain for compilation of ANSI C code.

  4. Community

    1. Gadget Factory

      Gadget Factory discussions. Have ideas to make Gadget Factory better? Having problems with the website? Let us know here.

    2. Documentation

      Request any FPGA, VHDL, or Papilio related tutorials. We will do our best to write as many as we can.

    3. FPGA Discussions

      Ask FPGA questions, share FPGA knowledge.

    4. Community Projects

      Got an idea for a project, talk about it and even work on it with other members of the community.

    5. Pipistrello

      Papilio on Steroids board developed by Saanlima Electronics.

      This is not produced by Gadget Factory but is a very interesting board we are happy to be associated with.

  5. Open Bench

    1. Open Bench Logic Sniffer at Dangerous Prototypes   (8,451 visits to this link)

      Discussions about the Open Bench Logic Sniffer on the Dangerous Prototypes Forum.

    2. OpenBench Logic Sniffer at Gadget Factory

      Discuss your OpenBench Logic Sniffer

  • Recent Topics

  • New Downloads

  • Recent Posts

    • Board support in Xilinx Impact
      I can't get this to work, all i get is "Digilent Plugin: no JTAG device was found.", on plugin version 2.4.4 or 2.5.2 I'm using a generic ft2232h breakout that i've set to use the FTDI vid/pid (and even tried setting the correct manuf/description as well as user area contents, no change). It's supposed to show up as USB Serial Converter A and B, right ?
    • Clock
      max_counter has an initial value of all 1's but never assigned any other value so it's basically a constant.  The warning is just another way of saying that. As for the timing of this block, I'm not sure what you are trying to accomplish here.  A 20 bit PWM circuit clocked at 200 MHz will have a period of about 200 Hz so you will need a very low frequency low-pass filter (~50 Hz) on the PWM output if you are trying to implement some sort of DAC.  In general, for PWM DACs and delta-sigma DACs, the more bits of resolution you have the lower frequency components will show up on the output.  Maybe your application is fine with a 50 Hz cut-off on the output, if not then I suggest rethinking your design. I'm not sure this relates to your project but this thread might have useful information: Magnus
    • USB controller / wing
      +1: get rid of SDRAM CKE. We always tie that to '1'. +2: get rid of LED  
    • Clock
      I need help tracing down a warning and general improvements. Here is the warning: Signal <max_counter> is used but never assigned. This sourceless signal will be automatically connected to value 11111111111111111111 Here the VHDL code for a 20-bit PWM: library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.NUMERIC_STD.ALL; entity Generic_PWM_x1 is port( clk: in std_logic; pwm_var: in std_logic_vector(19 downto 0); pwm_out: out std_logic ); end Generic_PWM_x1; architecture Behavioral of Generic_PWM_x1 is signal counter: std_logic_vector(19 downto 0):= (others=>'0'); signal max_counter: std_logic_vector(19 downto 0):= (others=>'1'); begin process(clk) begin if rising_edge(clk) then counter <= std_logic_vector( unsigned(counter) + 1 ); if counter=max_counter then counter<=(others=>'0'); else if counter<pwm_var then pwm_out<='1'; else pwm_out<='0'; end if; end if; end if; end process; end Behavioral; It seems to me that it's assigned, so I need some guidance. In general, I'm also interested in improving the timing of this block, so any suggestions would be very much appreciated. Thanks!
    • USB controller / wing
      I found the 8 pins needed for the TUSB1106 but 12 pins might be difficult, going to take a look at the design again. Jack.